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Marek Vasut92c34832011-01-19 04:40:37 +00001/*
2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Configuration settings for the MX51EVK Board
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27#include <config_cmd_default.h>
28
29/*
30 * High Level Board Configuration Options
31 */
32/* An i.MX51 CPU */
33#define CONFIG_MX51
Marek Vasut3cc35cc2011-09-25 09:55:43 +000034
35#define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
36#define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
37
Marek Vasut92c34832011-01-19 04:40:37 +000038#include <asm/arch/imx-regs.h>
39
40#define CONFIG_SYS_MX5_HCLK 24000000
41#define CONFIG_SYS_MX5_CLK32 32768
42#define CONFIG_DISPLAY_CPUINFO
43#define CONFIG_DISPLAY_BOARDINFO
44
Jana Rapava8b8ae202011-07-11 14:16:44 +000045#define CONFIG_SYS_TEXT_BASE 0x97800000
46
Marek Vasutf2ebfeb2011-06-24 21:46:07 +020047#define CONFIG_L2_OFF
48#define CONFIG_SYS_ICACHE_OFF
49#define CONFIG_SYS_DCACHE_OFF
50
Marek Vasut92c34832011-01-19 04:40:37 +000051/*
52 * Bootloader Components Configuration
53 */
54#define CONFIG_CMD_SPI
55#define CONFIG_CMD_SF
56#define CONFIG_CMD_MMC
57#define CONFIG_CMD_FAT
Marek Vasut175f31f2011-07-11 14:16:45 +000058#define CONFIG_CMD_EXT2
Marek Vasut92c34832011-01-19 04:40:37 +000059#define CONFIG_CMD_IDE
Marek Vasutf2ebfeb2011-06-24 21:46:07 +020060#define CONFIG_CMD_NET
61#define CONFIG_CMD_DATE
Marek Vasut92c34832011-01-19 04:40:37 +000062#undef CONFIG_CMD_IMLS
63
64/*
65 * Environmental settings
66 */
67
68#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
69#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
70#define CONFIG_ENV_SIZE (4 * 1024)
71
72/*
73 * ATAG setup
74 */
75#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
76#define CONFIG_REVISION_TAG
77#define CONFIG_SETUP_MEMORY_TAGS
78#define CONFIG_INITRD_TAG
79
Grant Likely100b8492011-03-28 09:59:07 +000080#define CONFIG_OF_LIBFDT 1
81
Marek Vasut92c34832011-01-19 04:40:37 +000082/*
83 * Size of malloc() pool
84 */
85#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
86
87#define CONFIG_BOARD_EARLY_INIT_F
Helmut Raigerd5a184b2011-10-20 04:19:47 +000088#define CONFIG_BOARD_LATE_INIT
Marek Vasut92c34832011-01-19 04:40:37 +000089
90/*
91 * Hardware drivers
92 */
93#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010094#define CONFIG_MXC_UART_BASE UART1_BASE
Marek Vasut92c34832011-01-19 04:40:37 +000095#define CONFIG_CONS_INDEX 1
96#define CONFIG_BAUDRATE 115200
Marek Vasut92c34832011-01-19 04:40:37 +000097
98#define CONFIG_MXC_GPIO
99
100/*
101 * SPI Interface
102 */
103#ifdef CONFIG_CMD_SPI
104
105#define CONFIG_HARD_SPI
106#define CONFIG_MXC_SPI
107#define CONFIG_DEFAULT_SPI_BUS 1
108#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
109
110/* SPI FLASH */
111#ifdef CONFIG_CMD_SF
112
113#define CONFIG_SPI_FLASH
114#define CONFIG_SPI_FLASH_SST
Fabio Estevam608e9092012-03-22 14:29:04 +0000115#define CONFIG_SF_DEFAULT_CS (1 | 121 << 8)
Marek Vasut92c34832011-01-19 04:40:37 +0000116#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
117#define CONFIG_SF_DEFAULT_SPEED 25000000
118
119#define CONFIG_ENV_SPI_CS (1 | 121 << 8)
120#define CONFIG_ENV_SPI_BUS 0
121#define CONFIG_ENV_SPI_MAX_HZ 25000000
122#define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
123#define CONFIG_FSL_ENV_IN_SF
124#define CONFIG_ENV_IS_IN_SPI_FLASH
125#define CONFIG_SYS_NO_FLASH
126
127#else
128#define CONFIG_ENV_IS_NOWHERE
129#endif
130
131/* SPI PMIC */
Stefano Babic11bbd712011-10-06 11:44:26 +0200132#define CONFIG_PMIC
133#define CONFIG_PMIC_SPI
134#define CONFIG_PMIC_FSL
Marek Vasut92c34832011-01-19 04:40:37 +0000135#define CONFIG_FSL_PMIC_BUS 0
136#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
137#define CONFIG_FSL_PMIC_CLK 25000000
138#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
Stefano Babic11bbd712011-10-06 11:44:26 +0200139#define CONFIG_FSL_PMIC_BITLEN 32
Fabio Estevam3f8d1782011-10-24 06:44:15 +0000140#define CONFIG_RTC_MC13XXX
Marek Vasut92c34832011-01-19 04:40:37 +0000141#endif
142
143/*
144 * MMC Configs
145 */
146#ifdef CONFIG_CMD_MMC
147#define CONFIG_MMC
148#define CONFIG_GENERIC_MMC
149#define CONFIG_FSL_ESDHC
150#define CONFIG_SYS_FSL_ESDHC_ADDR 0
151#define CONFIG_SYS_FSL_ESDHC_NUM 2
152#endif
153
154/*
155 * ATA/IDE
156 */
157#ifdef CONFIG_CMD_IDE
158#define CONFIG_LBA48
159#undef CONFIG_IDE_LED
160#undef CONFIG_IDE_RESET
161
162#define CONFIG_MX51_PATA
163
164#define __io
165
166#define CONFIG_SYS_IDE_MAXBUS 1
167#define CONFIG_SYS_IDE_MAXDEVICE 1
168
169#define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
170#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
171
172#define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
173#define CONFIG_SYS_ATA_REG_OFFSET 0xa0
174#define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
175
176#define CONFIG_SYS_ATA_STRIDE 4
177
178#define CONFIG_IDE_PREINIT
179#define CONFIG_MXC_ATA_PIO_MODE 4
180#endif
181
182/*
Marek Vasutf2ebfeb2011-06-24 21:46:07 +0200183 * USB
184 */
185#define CONFIG_CMD_USB
186#ifdef CONFIG_CMD_USB
187#define CONFIG_USB_EHCI /* Enable EHCI USB support */
188#define CONFIG_USB_EHCI_MX5
189#define CONFIG_USB_ULPI
190#define CONFIG_USB_ULPI_VIEWPORT
191#define CONFIG_MXC_USB_PORT 1
192#if (CONFIG_MXC_USB_PORT == 0)
193#define CONFIG_MXC_USB_PORTSC (1 << 28)
194#define CONFIG_MXC_USB_FLAGS MXC_EHCI_INTERNAL_PHY
195#else
196#define CONFIG_MXC_USB_PORTSC (2 << 30)
197#define CONFIG_MXC_USB_FLAGS 0
198#endif
199#define CONFIG_EHCI_IS_TDI
200#define CONFIG_USB_STORAGE
201#define CONFIG_USB_HOST_ETHER
202#define CONFIG_USB_KEYBOARD
203#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
204#define CONFIG_PREBOOT
205/* USB NET */
206#ifdef CONFIG_CMD_NET
207#define CONFIG_USB_ETHER_ASIX
Marek Vasutf2ebfeb2011-06-24 21:46:07 +0200208#define CONFIG_CMD_PING
209#define CONFIG_CMD_DHCP
210#endif
211#endif /* CONFIG_CMD_USB */
212
213/*
Marek Vasut92c34832011-01-19 04:40:37 +0000214 * Filesystems
215 */
216#ifdef CONFIG_CMD_FAT
217#define CONFIG_DOS_PARTITION
Marek Vasutf2ebfeb2011-06-24 21:46:07 +0200218#ifdef CONFIG_CMD_NET
219#define CONFIG_CMD_NFS
Marek Vasut92c34832011-01-19 04:40:37 +0000220#endif
Marek Vasutf2ebfeb2011-06-24 21:46:07 +0200221#endif
Marek Vasut92c34832011-01-19 04:40:37 +0000222
223/*
224 * Miscellaneous configurable options
225 */
226#define CONFIG_ENV_OVERWRITE
227#define CONFIG_BOOTDELAY 3
228#define CONFIG_LOADADDR 0x90800000
229
230#define CONFIG_SYS_LONGHELP /* undef to save memory */
231#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Marek Vasut92c34832011-01-19 04:40:37 +0000232#define CONFIG_SYS_PROMPT "Efika> "
233#define CONFIG_AUTO_COMPLETE
234#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
235/* Print Buffer Size */
236#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
237#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
238#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
239
240#define CONFIG_SYS_MEMTEST_START 0x90000000
Fabio Estevameae01fe2012-02-09 14:25:11 +0000241#define CONFIG_SYS_MEMTEST_END 0x90010000
Marek Vasut92c34832011-01-19 04:40:37 +0000242
243#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
244
245#define CONFIG_SYS_HZ 1000
246#define CONFIG_CMDLINE_EDITING
247
248/*-----------------------------------------------------------------------
Marek Vasut92c34832011-01-19 04:40:37 +0000249 * Physical Memory Map
250 */
251#define CONFIG_NR_DRAM_BANKS 1
252#define PHYS_SDRAM_1 CSD0_BASE_ADDR
253#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
254
255#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
256#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
257#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
258
259#define CONFIG_SYS_INIT_SP_OFFSET \
260 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
261#define CONFIG_SYS_INIT_SP_ADDR \
262 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
263
264#define CONFIG_SYS_DDR_CLKSEL 0
Marek Vasut851e48d2011-09-14 18:16:57 +0000265#define CONFIG_SYS_CLKTL_CBCDR 0x59E35145
Marek Vasut92c34832011-01-19 04:40:37 +0000266
267#endif