| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Configuration settings for the SAMA5D4 Xplained ultra board. | ||||
| 4 | * | ||||
| 5 | * Copyright (C) 2014 Atmel | ||||
| 6 | * Bo Shen <voice.shen@atmel.com> | ||||
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 7 | */ |
| 8 | |||||
| 9 | #ifndef __CONFIG_H | ||||
| 10 | #define __CONFIG_H | ||||
| 11 | |||||
| Wu, Josh | 4258754 | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 12 | #include "at91-sama5_common.h" |
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 13 | |
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 14 | /* SDRAM */ |
| Wenyou Yang | d19b901 | 2017-09-14 11:07:42 +0800 | [diff] [blame] | 15 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 16 | #define CONFIG_SYS_SDRAM_SIZE 0x20000000 |
| 17 | |||||
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 18 | /* NAND flash */ |
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 19 | #ifdef CONFIG_CMD_NAND |
| Wenyou Yang | d19b901 | 2017-09-14 11:07:42 +0800 | [diff] [blame] | 20 | #define CONFIG_SYS_NAND_BASE 0x80000000 |
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 21 | /* our ALE is AD21 */ |
| 22 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | ||||
| 23 | /* our CLE is AD22 */ | ||||
| 24 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | ||||
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 25 | #endif |
| 26 | |||||
| Bo Shen | e47c007 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 27 | /* SPL */ |
| Bo Shen | e47c007 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 28 | |
| Bo Shen | 58258bd | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 29 | #endif |