blob: 1c44f76b17131b8d086d6355387ebf9e11ba4340 [file] [log] [blame]
Andrej Rosanofddfa9c2015-04-08 18:56:30 +02001/*
2 * USB armory MkI board configuration settings
3 * http://inversepath.com/usbarmory
4 *
5 * Copyright (C) 2015, Inverse Path
6 * Andrej Rosano <andrej@inversepath.com>
7 *
8 * SPDX-License-Identifier:|____GPL-2.0+
9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Gong Qianyu52de2e52015-10-26 19:47:42 +080014#define CONFIG_SYS_FSL_CLK
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020015
16#include <asm/arch/imx-regs.h>
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020017
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020018/* U-Boot environment */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020019#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
20#define CONFIG_ENV_SIZE (8 * 1024)
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020021#define CONFIG_SYS_MMC_ENV_DEV 0
22
23/* U-Boot general configurations */
24#define CONFIG_SYS_CBSIZE 512
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020025
26/* UART */
27#define CONFIG_MXC_UART
28#define CONFIG_MXC_UART_BASE UART1_BASE
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020029
30/* SD/MMC */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020031#define CONFIG_SYS_FSL_ESDHC_ADDR 0
32#define CONFIG_SYS_FSL_ESDHC_NUM 1
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020033
34/* USB */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020035#define CONFIG_USB_EHCI_MX5
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020036#define CONFIG_MXC_USB_PORT 1
37#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
38#define CONFIG_MXC_USB_FLAGS 0
39
40/* I2C */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020041#define CONFIG_SYS_I2C
42#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020043#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
44#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020045
46/* Fuse */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020047#define CONFIG_FSL_IIM
48
Andrej Rosanof079e0d2016-06-20 17:21:48 +020049/* U-Boot memory offsets */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020050#define CONFIG_LOADADDR 0x72000000
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020051#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
Andrej Rosanof079e0d2016-06-20 17:21:48 +020052
53/* Linux boot */
Mario Six790d8442018-03-28 14:38:20 +020054#define CONFIG_HOSTNAME "usbarmory"
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020055#define CONFIG_BOOTCOMMAND \
56 "run distro_bootcmd; " \
57 "setenv bootargs console=${console} ${bootargs_default}; " \
Andrej Rosanof079e0d2016-06-20 17:21:48 +020058 "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020059 "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
Andrej Rosanof079e0d2016-06-20 17:21:48 +020060 "bootz ${kernel_addr_r} - ${fdt_addr_r}"
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020061
62#define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
63
64#include <config_distro_bootcmd.h>
65
66#define MEM_LAYOUT_ENV_SETTINGS \
67 "kernel_addr_r=0x70800000\0" \
68 "fdt_addr_r=0x71000000\0" \
69 "scriptaddr=0x70800000\0" \
70 "pxefile_addr_r=0x70800000\0" \
71 "ramdisk_addr_r=0x73000000\0"
72
73#define CONFIG_EXTRA_ENV_SETTINGS \
74 MEM_LAYOUT_ENV_SETTINGS \
75 "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \
76 "fdtfile=imx53-usbarmory.dtb\0" \
77 "console=ttymxc0,115200\0" \
78 BOOTENV
79
Andrej Rosanobab77d02016-06-20 17:21:49 +020080#ifndef CONFIG_CMDLINE
Andrej Rosanobab77d02016-06-20 17:21:49 +020081#define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
82#define USBARMORY_FIT_ADDR "0x70800000"
83#endif
84
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020085/* Physical Memory Map */
86#define CONFIG_NR_DRAM_BANKS 1
87#define PHYS_SDRAM CSD0_BASE_ADDR
88#define PHYS_SDRAM_SIZE (gd->ram_size)
89
90#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
91#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
92#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
93
94#define CONFIG_SYS_INIT_SP_OFFSET \
95 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
96#define CONFIG_SYS_INIT_SP_ADDR \
97 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
98
99#define CONFIG_SYS_MEMTEST_START 0x70000000
100#define CONFIG_SYS_MEMTEST_END 0x90000000
101
102#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
103
104#endif /* __CONFIG_H */