blob: 988b747cbc93a4ff0fc1f42567d29cd0e494b2cc [file] [log] [blame]
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +09001/*
2 * include/configs/koelsch.h
3 *
4 * Copyright (C) 2013 Renesas Electronics Corporation
5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9#ifndef __KOELSCH_H
10#define __KOELSCH_H
11
12#undef DEBUG
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090013#define CONFIG_R8A7791
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +090014#define CONFIG_ARCH_RMOBILE_BOARD_STRING "Koelsch"
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090015
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090016#include "rcar-gen2-common.h"
Nobuhiro Iwamatsu04207bc2014-03-31 15:22:31 +090017
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +090018#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsu25c0dca2014-10-31 16:16:27 +090019#define CONFIG_SYS_TEXT_BASE 0x70000000
20#else
Nobuhiro Iwamatsu1484dd82014-01-08 10:32:24 +090021#define CONFIG_SYS_TEXT_BASE 0xE6304000
Nobuhiro Iwamatsu25c0dca2014-10-31 16:16:27 +090022#endif
23
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090024/* STACK */
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +090025#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsu25c0dca2014-10-31 16:16:27 +090026#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
27#else
28#define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC
29#endif
30
31#define STACK_AREA_SIZE 0xC000
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090032#define LOW_LEVEL_MERAM_STACK \
33 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
34
35/* MEMORY */
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090036#define RCAR_GEN2_SDRAM_BASE 0x40000000
37#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
38#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090039
40/* SCIF */
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090041
42/* FLASH */
Nobuhiro Iwamatsu1484dd82014-01-08 10:32:24 +090043#define CONFIG_SPI
44#define CONFIG_SH_QSPI
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090045
Nobuhiro Iwamatsu157585e2013-10-20 20:37:17 +090046/* SH Ether */
Nobuhiro Iwamatsu157585e2013-10-20 20:37:17 +090047#define CONFIG_SH_ETHER
48#define CONFIG_SH_ETHER_USE_PORT 0
49#define CONFIG_SH_ETHER_PHY_ADDR 0x1
50#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
51#define CONFIG_SH_ETHER_CACHE_WRITEBACK
52#define CONFIG_SH_ETHER_CACHE_INVALIDATE
53#define CONFIG_PHYLIB
54#define CONFIG_PHY_MICREL
55#define CONFIG_BITBANGMII
56#define CONFIG_BITBANGMII_MULTI
57#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
58
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090059/* Board Clock */
Nobuhiro Iwamatsuc7922f32014-03-31 11:06:46 +090060#define RMOBILE_XTAL_CLK 20000000u
61#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
62#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090063#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090064
Nobuhiro Iwamatsu2546d4f2013-09-11 15:04:33 +090065/* i2c */
Nobuhiro Iwamatsu2546d4f2013-09-11 15:04:33 +090066#define CONFIG_SYS_I2C
67#define CONFIG_SYS_I2C_SH
68#define CONFIG_SYS_I2C_SLAVE 0x7F
69#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
Nobuhiro Iwamatsu2546d4f2013-09-11 15:04:33 +090070#define CONFIG_SYS_I2C_SH_SPEED0 400000
Nobuhiro Iwamatsu2546d4f2013-09-11 15:04:33 +090071#define CONFIG_SYS_I2C_SH_SPEED1 400000
Nobuhiro Iwamatsu2546d4f2013-09-11 15:04:33 +090072#define CONFIG_SYS_I2C_SH_SPEED2 400000
73#define CONFIG_SH_I2C_DATA_HIGH 4
74#define CONFIG_SH_I2C_DATA_LOW 5
75#define CONFIG_SH_I2C_CLOCK 10000000
76
Nobuhiro Iwamatsu6c57c162013-10-10 10:48:20 +090077#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
78
Nobuhiro Iwamatsue7c981e2014-03-27 14:13:06 +090079/* USB */
Nobuhiro Iwamatsue7c981e2014-03-27 14:13:06 +090080#define CONFIG_USB_EHCI_RMOBILE
Nobuhiro Iwamatsua9c085f2014-07-28 15:29:31 +090081#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
Nobuhiro Iwamatsue7c981e2014-03-27 14:13:06 +090082
Nobuhiro Iwamatsue02f1742014-12-02 16:52:24 +090083/* Module stop status bits */
84/* INTC-RT */
85#define CONFIG_SMSTP0_ENA 0x00400000
86/* MSIF*/
87#define CONFIG_SMSTP2_ENA 0x00002000
88/* INTC-SYS, IRQC */
89#define CONFIG_SMSTP4_ENA 0x00000180
90/* SCIF0 */
91#define CONFIG_SMSTP7_ENA 0x00200000
92
Nobuhiro Iwamatsuaf33ae72014-11-12 13:03:54 +090093/* SD */
Nobuhiro Iwamatsuaf33ae72014-11-12 13:03:54 +090094#define CONFIG_SH_SDHI_FREQ 97500000
95
Nobuhiro Iwamatsu7fbb92b2013-11-21 17:07:46 +090096#endif /* __KOELSCH_H */