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git01.mediatek.com / filogic / uboot / 78be28007e70b658b8547b9ceeeff98deb19b64c / . / board / atmel / at91sam9261ek / led.c
blob: 485d7ea81f245a892ab5eee1d39da759b9b1b16b [file] [log] [blame]
Stelian Pop61e69d72008-05-08 20:52:22 +0200[diff] [blame]1/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +0100[diff] [blame]3 * Stelian Pop <stelian@popies.net>
Stelian Pop61e69d72008-05-08 20:52:22 +0200[diff] [blame]4 * Lead Tech Design <www.leadtechdesign.com>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]6 * SPDX-License-Identifier: GPL-2.0+
Stelian Pop61e69d72008-05-08 20:52:22 +0200[diff] [blame]7 */
8
9#include <common.h>
10#include <asm/arch/at91sam9261.h>
Stelian Pop61e69d72008-05-08 20:52:22 +0200[diff] [blame]11#include <asm/arch/gpio.h>
Xu, Hong0a614942011-07-31 22:49:00 +0000[diff] [blame]12#include <asm/arch/at91_pio.h>
Wenyou Yang78f89762016-02-03 10:16:50 +0800[diff] [blame]13#include <asm/arch/clk.h>
Xu, Hong0a614942011-07-31 22:49:00 +0000[diff] [blame]14#include <asm/io.h>
Stelian Pop61e69d72008-05-08 20:52:22 +0200[diff] [blame]15
Stelian Pop61e69d72008-05-08 20:52:22 +0200[diff] [blame]16void coloured_LED_init(void)
17{
18 /* Enable clock */
Wenyou Yang78f89762016-02-03 10:16:50 +0800[diff] [blame]19 at91_periph_clk_enable(ATMEL_ID_PIOA);
Stelian Pop61e69d72008-05-08 20:52:22 +0200[diff] [blame]20
Jean-Christophe PLAGNIOL-VILLARD476d10e2009-03-21 21:08:00 +0100[diff] [blame]21 at91_set_gpio_output(CONFIG_RED_LED, 1);
22 at91_set_gpio_output(CONFIG_GREEN_LED, 1);
23 at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
Stelian Pop61e69d72008-05-08 20:52:22 +0200[diff] [blame]24
Jean-Christophe PLAGNIOL-VILLARD476d10e2009-03-21 21:08:00 +0100[diff] [blame]25 at91_set_gpio_value(CONFIG_RED_LED, 0);
26 at91_set_gpio_value(CONFIG_GREEN_LED, 1);
27 at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
Stelian Pop61e69d72008-05-08 20:52:22 +0200[diff] [blame]28}