Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 1 | /* |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 2 | * (C) Copyright 2005 |
| 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /************************************************************************ |
| 25 | * yellowstone.h - configuration for YELLOWSTONE board |
| 26 | ***********************************************************************/ |
| 27 | #ifndef __CONFIG_H |
| 28 | #define __CONFIG_H |
| 29 | |
| 30 | /*----------------------------------------------------------------------- |
| 31 | * High Level Configuration Options |
| 32 | *----------------------------------------------------------------------*/ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 33 | #define CONFIG_YOLLOWSTONE 1 /* Board is Yellowstone */ |
| 34 | #define CONFIG_440GR 1 /* Specific PPC440EP support */ |
| 35 | #define CONFIG_4xx 1 /* ... PPC4xx family */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 36 | #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ |
| 37 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 38 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ |
| 39 | #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ |
| 40 | |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 41 | /*----------------------------------------------------------------------- |
| 42 | * Base addresses -- Note these are effective addresses where the |
| 43 | * actual resources get mapped (not physical addresses) |
| 44 | *----------------------------------------------------------------------*/ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 45 | #define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ |
| 46 | #define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ |
| 47 | #define CFG_MONITOR_BASE (-CFG_MONITOR_LEN) |
| 48 | #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */ |
| 49 | #define CFG_FLASH_BASE 0xfc000000 /* start of FLASH */ |
| 50 | #define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/ |
| 51 | #define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000 |
| 52 | #define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000 |
| 53 | #define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000 |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 54 | |
| 55 | /*Don't change either of these*/ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 56 | #define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/ |
| 57 | #define CFG_PCI_BASE 0xe0000000 /* internal PCI regs*/ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 58 | /*Don't change either of these*/ |
| 59 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 60 | #define CFG_USB_DEVICE 0x50000000 |
| 61 | #define CFG_NVRAM_BASE_ADDR 0x80000000 |
| 62 | #define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR | 0x2000) |
| 63 | #define CFG_BOOT_BASE_ADDR 0xf0000000 |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 64 | |
| 65 | /*----------------------------------------------------------------------- |
| 66 | * Initial RAM & stack pointer (placed in SDRAM) |
| 67 | *----------------------------------------------------------------------*/ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 68 | #define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */ |
| 69 | #define CFG_INIT_RAM_END (8 << 10) |
| 70 | #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 71 | #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
| 72 | #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
| 73 | |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 74 | /*----------------------------------------------------------------------- |
| 75 | * Serial Port |
| 76 | *----------------------------------------------------------------------*/ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 77 | #define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 78 | #define CONFIG_BAUDRATE 115200 |
| 79 | #define CONFIG_SERIAL_MULTI 1 |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 80 | /*define this if you want console on UART1*/ |
| 81 | #undef CONFIG_UART1_CONSOLE |
| 82 | |
| 83 | #define CFG_BAUDRATE_TABLE \ |
| 84 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} |
| 85 | |
| 86 | /*----------------------------------------------------------------------- |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 87 | * Environment |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 88 | *----------------------------------------------------------------------*/ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 89 | /* |
| 90 | * Define here the location of the environment variables (FLASH or EEPROM). |
| 91 | * Note: DENX encourages to use redundant environment in FLASH. |
| 92 | */ |
| 93 | #if 1 |
| 94 | #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ |
| 95 | #else |
| 96 | #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ |
| 97 | #endif |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 98 | |
| 99 | /*----------------------------------------------------------------------- |
| 100 | * FLASH related |
| 101 | *----------------------------------------------------------------------*/ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 102 | #define CFG_FLASH_CFI /* The flash is CFI compatible */ |
| 103 | #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ |
| 104 | #define CFG_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 105 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 106 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 107 | #define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ |
| 108 | |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 109 | #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 110 | #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
| 111 | |
| 112 | #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
| 113 | |
| 114 | #ifdef CFG_ENV_IS_IN_FLASH |
| 115 | #define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ |
| 116 | #define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE) |
| 117 | #define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ |
| 118 | |
| 119 | /* Address and size of Redundant Environment Sector */ |
| 120 | #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE) |
| 121 | #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) |
| 122 | #endif /* CFG_ENV_IS_IN_FLASH */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 123 | |
| 124 | /*----------------------------------------------------------------------- |
| 125 | * DDR SDRAM |
| 126 | *----------------------------------------------------------------------*/ |
Wolfgang Denk | d06ce5d | 2005-08-02 17:06:17 +0200 | [diff] [blame] | 127 | #undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 128 | #define CFG_KBYTES_SDRAM (128 * 1024) /* 128MB */ |
| 129 | #define CFG_SDRAM_BANKS (2) |
| 130 | |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 131 | |
| 132 | /*----------------------------------------------------------------------- |
| 133 | * I2C |
| 134 | *----------------------------------------------------------------------*/ |
| 135 | #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ |
| 136 | #undef CONFIG_SOFT_I2C /* I2C bit-banged */ |
| 137 | #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ |
| 138 | #define CFG_I2C_SLAVE 0x7F |
| 139 | |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 140 | #define CFG_I2C_MULTI_EEPROMS |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 141 | #define CFG_I2C_EEPROM_ADDR (0xa8>>1) |
| 142 | #define CFG_I2C_EEPROM_ADDR_LEN 1 |
| 143 | #define CFG_EEPROM_PAGE_WRITE_ENABLE |
| 144 | #define CFG_EEPROM_PAGE_WRITE_BITS 3 |
| 145 | #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 |
| 146 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 147 | #ifdef CFG_ENV_IS_IN_EEPROM |
| 148 | #define CFG_ENV_SIZE 0x200 /* Size of Environment vars */ |
| 149 | #define CFG_ENV_OFFSET 0x0 |
| 150 | #endif /* CFG_ENV_IS_IN_EEPROM */ |
| 151 | |
| 152 | #define CONFIG_PREBOOT "echo;" \ |
| 153 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ |
| 154 | "echo" |
| 155 | |
| 156 | #undef CONFIG_BOOTARGS |
| 157 | |
| 158 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 159 | "netdev=eth0\0" \ |
| 160 | "hostname=yellowstone\0" \ |
| 161 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
| 162 | "nfsroot=$(serverip):$(rootpath)\0" \ |
| 163 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
| 164 | "addip=setenv bootargs $(bootargs) " \ |
| 165 | "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ |
| 166 | ":$(hostname):$(netdev):off panic=1\0" \ |
| 167 | "addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\ |
| 168 | "flash_nfs=run nfsargs addip addtty;" \ |
| 169 | "bootm $(kernel_addr)\0" \ |
| 170 | "flash_self=run ramargs addip addtty;" \ |
| 171 | "bootm $(kernel_addr) $(ramdisk_addr)\0" \ |
| 172 | "net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;" \ |
| 173 | "bootm\0" \ |
| 174 | "rootpath=/opt/eldk/ppc_4xx\0" \ |
| 175 | "bootfile=/tftpboot/yellowstone/uImage\0" \ |
| 176 | "kernel_addr=fc000000\0" \ |
| 177 | "ramdisk_addr=fc100000\0" \ |
| 178 | "load=tftp 100000 /tftpboot/yellowstone/u-boot.bin\0" \ |
| 179 | "update=protect off fff80000 ffffffff;era fff80000 ffffffff;" \ |
| 180 | "cp.b 100000 fff80000 80000;" \ |
| 181 | "setenv filesize;saveenv\0" \ |
| 182 | "upd=run load;run update\0" \ |
| 183 | "" |
| 184 | #define CONFIG_BOOTCOMMAND "run flash_self" |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 185 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 186 | #if 0 |
| 187 | #define CONFIG_BOOTDELAY -1 /* autoboot disabled */ |
| 188 | #else |
| 189 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
| 190 | #endif |
| 191 | |
| 192 | #define CONFIG_BAUDRATE 115200 |
| 193 | |
| 194 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 195 | #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
| 196 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 197 | #define CONFIG_MII 1 /* MII PHY management */ |
| 198 | #define CONFIG_NET_MULTI 1 /* required for netconsole */ |
| 199 | #define CONFIG_PHY1_ADDR 3 |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 200 | #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ |
| 201 | #define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 202 | |
| 203 | #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 204 | |
| 205 | /* Partitions */ |
| 206 | #define CONFIG_MAC_PARTITION |
| 207 | #define CONFIG_DOS_PARTITION |
| 208 | #define CONFIG_ISO_PARTITION |
| 209 | |
Stefan Roese | b30f2a1 | 2005-08-08 12:42:22 +0200 | [diff] [blame] | 210 | #ifdef CONFIG_440EP |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 211 | /* USB */ |
| 212 | #define CONFIG_USB_OHCI |
| 213 | #define CONFIG_USB_STORAGE |
| 214 | |
| 215 | /*Comment this out to enable USB 1.1 device*/ |
| 216 | #define USB_2_0_DEVICE |
Stefan Roese | b30f2a1 | 2005-08-08 12:42:22 +0200 | [diff] [blame] | 217 | #endif /*CONFIG_440EP*/ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 218 | |
| 219 | #ifdef DEBUG |
| 220 | #define CONFIG_PANIC_HANG |
| 221 | #else |
| 222 | #define CONFIG_HW_WATCHDOG /* watchdog */ |
| 223 | #endif |
| 224 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 225 | #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ |
| 226 | CFG_CMD_ASKENV | \ |
| 227 | CFG_CMD_DHCP | \ |
| 228 | CFG_CMD_DIAG | \ |
| 229 | CFG_CMD_ELF | \ |
| 230 | CFG_CMD_I2C | \ |
| 231 | CFG_CMD_IRQ | \ |
| 232 | CFG_CMD_MII | \ |
| 233 | CFG_CMD_NET | \ |
| 234 | CFG_CMD_NFS | \ |
| 235 | CFG_CMD_PCI | \ |
| 236 | CFG_CMD_PING | \ |
| 237 | CFG_CMD_REGINFO | \ |
| 238 | CFG_CMD_SDRAM) |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 239 | |
| 240 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
| 241 | #include <cmd_confdefs.h> |
| 242 | |
| 243 | /* |
| 244 | * Miscellaneous configurable options |
| 245 | */ |
| 246 | #define CFG_LONGHELP /* undef to save memory */ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 247 | #define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 248 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 249 | #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 250 | #else |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 251 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 252 | #endif |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 253 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 254 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 255 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 256 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 257 | #define CFG_MEMTEST_START 0x0400000 /* memtest works on */ |
| 258 | #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 259 | |
| 260 | #define CFG_LOAD_ADDR 0x100000 /* default load address */ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 261 | #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ |
| 262 | #define CONFIG_LYNXKDI 1 /* support kdi files */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 263 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 264 | #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 265 | |
| 266 | /*----------------------------------------------------------------------- |
| 267 | * PCI stuff |
| 268 | *----------------------------------------------------------------------- |
| 269 | */ |
| 270 | /* General PCI */ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 271 | #define CONFIG_PCI /* include pci support */ |
| 272 | #undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ |
| 273 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
| 274 | #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 275 | |
| 276 | /* Board-specific PCI */ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 277 | #define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 278 | #define CFG_PCI_TARGET_INIT |
| 279 | #define CFG_PCI_MASTER_INIT |
| 280 | |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 281 | #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ |
| 282 | #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 283 | |
| 284 | /* |
| 285 | * For booting Linux, the board info and command line data |
| 286 | * have to be in the first 8 MB of memory, since this is |
| 287 | * the maximum mapped by the Linux kernel during initialization. |
| 288 | */ |
| 289 | #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 290 | |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 291 | /*----------------------------------------------------------------------- |
| 292 | * Cache Configuration |
| 293 | */ |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 294 | #define CFG_DCACHE_SIZE (32<<10) /* For IBM 440 CPUs */ |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 295 | #define CFG_CACHELINE_SIZE 32 /* ... */ |
| 296 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
| 297 | #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
| 298 | #endif |
| 299 | |
| 300 | /* |
| 301 | * Internal Definitions |
| 302 | * |
| 303 | * Boot Flags |
| 304 | */ |
| 305 | #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
| 306 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ |
| 307 | |
| 308 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
| 309 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
| 310 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
| 311 | #endif |
Stefan Roese | 27ea7a9 | 2005-09-15 11:34:07 +0200 | [diff] [blame] | 312 | |
Stefan Roese | 326c971 | 2005-08-01 16:41:48 +0200 | [diff] [blame] | 313 | #endif /* __CONFIG_H */ |