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Anup Patel8d28c3c2019-02-25 08:14:55 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (c) 2019 Western Digital Corporation or its affiliates.
4 *
5 * Author: Anup Patel <anup.patel@wdc.com>
6 */
7
Patrick Delaunay8767e792021-11-19 15:12:07 +01008#define LOG_CATEGORY UCLASS_CLK
9
Anup Patel8d28c3c2019-02-25 08:14:55 +000010#include <common.h>
11#include <clk-uclass.h>
12#include <div64.h>
13#include <dm.h>
Patrick Delaunay8767e792021-11-19 15:12:07 +010014#include <log.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070015#include <linux/err.h>
Anup Patel8d28c3c2019-02-25 08:14:55 +000016
17struct clk_fixed_factor {
18 struct clk parent;
19 unsigned int div;
20 unsigned int mult;
21};
22
23#define to_clk_fixed_factor(dev) \
Simon Glassfa20e932020-12-03 16:55:20 -070024 ((struct clk_fixed_factor *)dev_get_plat(dev))
Anup Patel8d28c3c2019-02-25 08:14:55 +000025
26static ulong clk_fixed_factor_get_rate(struct clk *clk)
27{
28 uint64_t rate;
29 struct clk_fixed_factor *ff = to_clk_fixed_factor(clk->dev);
30
Anup Patel8d28c3c2019-02-25 08:14:55 +000031 rate = clk_get_rate(&ff->parent);
32 if (IS_ERR_VALUE(rate))
33 return rate;
34
35 do_div(rate, ff->div);
36
37 return rate * ff->mult;
38}
39
40const struct clk_ops clk_fixed_factor_ops = {
41 .get_rate = clk_fixed_factor_get_rate,
42};
43
Simon Glassaad29ae2020-12-03 16:55:21 -070044static int clk_fixed_factor_of_to_plat(struct udevice *dev)
Anup Patel8d28c3c2019-02-25 08:14:55 +000045{
Simon Glass6d70ba02021-08-07 07:24:06 -060046 if (CONFIG_IS_ENABLED(OF_REAL)) {
47 int err;
48 struct clk_fixed_factor *ff = to_clk_fixed_factor(dev);
Anup Patel8d28c3c2019-02-25 08:14:55 +000049
Simon Glass6d70ba02021-08-07 07:24:06 -060050 err = clk_get_by_index(dev, 0, &ff->parent);
51 if (err)
52 return err;
Anup Patel8d28c3c2019-02-25 08:14:55 +000053
Simon Glass6d70ba02021-08-07 07:24:06 -060054 ff->div = dev_read_u32_default(dev, "clock-div", 1);
55 ff->mult = dev_read_u32_default(dev, "clock-mult", 1);
56 }
Anup Patel8d28c3c2019-02-25 08:14:55 +000057
58 return 0;
59}
60
61static const struct udevice_id clk_fixed_factor_match[] = {
62 {
63 .compatible = "fixed-factor-clock",
64 },
65 { /* sentinel */ }
66};
67
68U_BOOT_DRIVER(clk_fixed_factor) = {
69 .name = "fixed_factor_clock",
70 .id = UCLASS_CLK,
71 .of_match = clk_fixed_factor_match,
Simon Glassaad29ae2020-12-03 16:55:21 -070072 .of_to_plat = clk_fixed_factor_of_to_plat,
Simon Glass71fa5b42020-12-03 16:55:18 -070073 .plat_auto = sizeof(struct clk_fixed_factor),
Anup Patel8d28c3c2019-02-25 08:14:55 +000074 .ops = &clk_fixed_factor_ops,
75};