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Michael Walle5d0ea112020-05-07 00:11:57 +02001* Qualcomm Atheros PHY Device Tree binding
2
3Required properties:
4- reg: PHY address
5
6Optional properties:
7- qca,clk-out-frequency: Clock frequency of the CLK_25M pin in Hz.
8 Either 25000000, 50000000, 62500000 or 125000000.
9- qca,clk-out-strength: Clock output buffer driver strength.
10 Supported values are defined in dt-bindings/net/qca-ar803x.h
11- qca,keep-pll-enabled: Keep the PLL running if no link is present.
12 Don't go into hibernation mode.
13 Only supported on the AR8031/AR8033.
14- vddio-supply: RGMII I/O voltage regulator
15 Only supported on the AR8031/AR8033.
16
17Optional subnodes:
18- vddio-regulator: Initial data for the VDDIO regulator, as covered
19 doc/device-tree-bindings/regulator/regulator.txt
20
21Example:
22 #include <dt-bindings/net/qca-ar803x.h>
23
24 ethernet-phy@0 {
25 reg = <0>;
Fabio Estevam5694b8e2020-06-17 15:07:04 -030026 qca,clk-out-frequency = <125000000>;
Michael Walle5d0ea112020-05-07 00:11:57 +020027 qca,keep-pll-enabled;
28
29 vddio-supply = <&vddio>;
30
31 vddio: vddio-regulator {
32 regulator-min-microvolt = <1800000>;
33 regulator-max-microvolt = <1800000>;
34 };
35 };