| Masahiro Yamada | 77f0822 | 2015-02-27 02:27:02 +0900 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2011-2015 Panasonic Corporation |
| 3 | * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/io.h> |
| 10 | #include <mach/sbc-regs.h> |
| 11 | #include <mach/sg-regs.h> |
| 12 | |
| 13 | void sbc_init(void) |
| 14 | { |
| 15 | /* XECS0: boot/sub memory (boot swap = off/on) */ |
| 16 | writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); |
| 17 | writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); |
| 18 | writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); |
| 19 | writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); |
| 20 | |
| 21 | /* XECS1: sub/boot memory (boot swap = off/on) */ |
| 22 | writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); |
| 23 | writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); |
| 24 | writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); |
| 25 | writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); |
| 26 | |
| 27 | /* XECS3: peripherals */ |
| 28 | writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); |
| 29 | writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); |
| 30 | writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32); |
| 31 | writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34); |
| 32 | |
| 33 | writel(0x0000bc01, SBBASE0); /* boot memory */ |
| 34 | writel(0x0400bc01, SBBASE1); /* sub memory */ |
| 35 | writel(0x0800bf01, SBBASE3); /* peripherals */ |
| 36 | |
| 37 | /* enable access to sub memory when boot swap is on */ |
| 38 | if (boot_is_swapped()) |
| 39 | sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */ |
| 40 | |
| 41 | sg_set_pinsel(313, 5); /* PORT15 -> XECS3 */ |
| 42 | writel(0x00000001, SG_LOADPINCTRL); |
| 43 | } |