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git01.mediatek.com / filogic / uboot / 77b92d607d2c77e8a5610492d3ccbaef02c85c44 / . / arch / arm / include / asm / arch-tegra210 / clock-tables.h
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Tom Warrenf80dd822015-02-02 13:22:29 -0700[diff] [blame]1/*
2 * (C) Copyright 2013-2015
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8/* Tegra210 clock PLL tables */
9
10#ifndef _TEGRA210_CLOCK_TABLES_H_
11#define _TEGRA210_CLOCK_TABLES_H_
12
13/* The PLLs supported by the hardware */
14enum clock_id {
15 CLOCK_ID_FIRST,
16 CLOCK_ID_CGENERAL = CLOCK_ID_FIRST,
17 CLOCK_ID_MEMORY,
18 CLOCK_ID_PERIPH,
19 CLOCK_ID_AUDIO,
20 CLOCK_ID_USB,
21 CLOCK_ID_DISPLAY,
22
23 /* now the simple ones */
24 CLOCK_ID_FIRST_SIMPLE,
25 CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,
26 CLOCK_ID_EPCI,
27 CLOCK_ID_SFROM32KHZ,
28
29 /* These are the base clocks (inputs to the Tegra SoC) */
30 CLOCK_ID_32KHZ,
31 CLOCK_ID_OSC,
32
33 CLOCK_ID_COUNT, /* number of PLLs */
34
35 /*
36 * These are clock IDs that are used in table clock_source[][]
37 * but will not be assigned as a clock source for any peripheral.
38 */
39 CLOCK_ID_DISPLAY2,
40 CLOCK_ID_CGENERAL_0,
41 CLOCK_ID_CGENERAL_1,
42 CLOCK_ID_CGENERAL2,
43 CLOCK_ID_CGENERAL3,
44 CLOCK_ID_CGENERAL4_0,
45 CLOCK_ID_CGENERAL4_1,
46 CLOCK_ID_CGENERAL4_2,
47 CLOCK_ID_MEMORY2,
48 CLOCK_ID_SRC2,
49
50 CLOCK_ID_NONE = -1,
51};
52
53/* The clocks supported by the hardware */
54enum periph_id {
55 PERIPH_ID_FIRST,
56
57 /* Low word: 31:0 (DEVICES_L) */
58 PERIPH_ID_CPU = PERIPH_ID_FIRST,
59 PERIPH_ID_COP,
60 PERIPH_ID_TRIGSYS,
61 PERIPH_ID_ISPB,
62 PERIPH_ID_RESERVED4,
63 PERIPH_ID_TMR,
64 PERIPH_ID_UART1,
65 PERIPH_ID_UART2,
66
67 /* 8 */
68 PERIPH_ID_GPIO,
69 PERIPH_ID_SDMMC2,
70 PERIPH_ID_SPDIF,
71 PERIPH_ID_I2S2,
72 PERIPH_ID_I2C1,
73 PERIPH_ID_RESERVED13,
74 PERIPH_ID_SDMMC1,
75 PERIPH_ID_SDMMC4,
76
77 /* 16 */
78 PERIPH_ID_TCW,
79 PERIPH_ID_PWM,
80 PERIPH_ID_I2S3,
81 PERIPH_ID_RESERVED19,
82 PERIPH_ID_VI,
83 PERIPH_ID_RESERVED21,
84 PERIPH_ID_USBD,
85 PERIPH_ID_ISP,
86
87 /* 24 */
88 PERIPH_ID_RESERVED24,
89 PERIPH_ID_RESERVED25,
90 PERIPH_ID_DISP2,
91 PERIPH_ID_DISP1,
92 PERIPH_ID_HOST1X,
93 PERIPH_ID_VCP,
94 PERIPH_ID_I2S1,
95 PERIPH_ID_CACHE2,
96
97 /* Middle word: 63:32 (DEVICES_H) */
98 PERIPH_ID_MEM,
99 PERIPH_ID_AHBDMA,
100 PERIPH_ID_APBDMA,
101 PERIPH_ID_RESERVED35,
102 PERIPH_ID_RESERVED36,
103 PERIPH_ID_STAT_MON,
104 PERIPH_ID_RESERVED38,
105 PERIPH_ID_FUSE,
106
107 /* 40 */
108 PERIPH_ID_KFUSE,
109 PERIPH_ID_SBC1,
110 PERIPH_ID_SNOR,
111 PERIPH_ID_RESERVED43,
112 PERIPH_ID_SBC2,
113 PERIPH_ID_XIO,
114 PERIPH_ID_SBC3,
115 PERIPH_ID_I2C5,
116
117 /* 48 */
118 PERIPH_ID_DSI,
119 PERIPH_ID_RESERVED49,
120 PERIPH_ID_HSI,
121 PERIPH_ID_HDMI,
122 PERIPH_ID_CSI,
123 PERIPH_ID_RESERVED53,
124 PERIPH_ID_I2C2,
125 PERIPH_ID_UART3,
126
127 /* 56 */
128 PERIPH_ID_MIPI_CAL,
129 PERIPH_ID_EMC,
130 PERIPH_ID_USB2,
131 PERIPH_ID_USB3,
132 PERIPH_ID_RESERVED60,
133 PERIPH_ID_VDE,
134 PERIPH_ID_BSEA,
135 PERIPH_ID_BSEV,
136
137 /* Upper word 95:64 (DEVICES_U) */
138 PERIPH_ID_RESERVED64,
139 PERIPH_ID_UART4,
140 PERIPH_ID_UART5,
141 PERIPH_ID_I2C3,
142 PERIPH_ID_SBC4,
143 PERIPH_ID_SDMMC3,
144 PERIPH_ID_PCIE,
145 PERIPH_ID_OWR,
146
147 /* 72 */
148 PERIPH_ID_AFI,
149 PERIPH_ID_CORESIGHT,
150 PERIPH_ID_PCIEXCLK,
151 PERIPH_ID_AVPUCQ,
152 PERIPH_ID_LA,
153 PERIPH_ID_TRACECLKIN,
154 PERIPH_ID_SOC_THERM,
155 PERIPH_ID_DTV,
156
157 /* 80 */
158 PERIPH_ID_RESERVED80,
159 PERIPH_ID_I2CSLOW,
160 PERIPH_ID_DSIB,
161 PERIPH_ID_TSEC,
162 PERIPH_ID_RESERVED84,
163 PERIPH_ID_RESERVED85,
164 PERIPH_ID_RESERVED86,
165 PERIPH_ID_EMUCIF,
166
167 /* 88 */
168 PERIPH_ID_RESERVED88,
169 PERIPH_ID_XUSB_HOST,
170 PERIPH_ID_RESERVED90,
171 PERIPH_ID_MSENC,
172 PERIPH_ID_RESERVED92,
173 PERIPH_ID_RESERVED93,
174 PERIPH_ID_RESERVED94,
175 PERIPH_ID_XUSB_DEV,
176
177 PERIPH_ID_VW_FIRST,
178 /* V word: 31:0 */
179 PERIPH_ID_CPUG = PERIPH_ID_VW_FIRST,
180 PERIPH_ID_CPULP,
181 PERIPH_ID_V_RESERVED2,
182 PERIPH_ID_MSELECT,
183 PERIPH_ID_V_RESERVED4,
184 PERIPH_ID_I2S4,
185 PERIPH_ID_I2S5,
186 PERIPH_ID_I2C4,
187
188 /* 104 */
189 PERIPH_ID_SBC5,
190 PERIPH_ID_SBC6,
191 PERIPH_ID_AHUB,
192 PERIPH_ID_APB2APE,
193 PERIPH_ID_V_RESERVED12,
194 PERIPH_ID_V_RESERVED13,
195 PERIPH_ID_V_RESERVED14,
196 PERIPH_ID_HDA2CODEC2X,
197
198 /* 112 */
199 PERIPH_ID_ATOMICS,
200 PERIPH_ID_V_RESERVED17,
201 PERIPH_ID_V_RESERVED18,
202 PERIPH_ID_V_RESERVED19,
203 PERIPH_ID_V_RESERVED20,
204 PERIPH_ID_V_RESERVED21,
205 PERIPH_ID_V_RESERVED22,
206 PERIPH_ID_ACTMON,
207
208 /* 120 */
209 PERIPH_ID_EXTPERIPH1,
210 PERIPH_ID_EXTPERIPH2,
211 PERIPH_ID_EXTPERIPH3,
212 PERIPH_ID_OOB,
213 PERIPH_ID_SATA,
214 PERIPH_ID_HDA,
215 PERIPH_ID_V_RESERVED30,
216 PERIPH_ID_V_RESERVED31,
217
218 /* W word: 31:0 */
219 PERIPH_ID_HDA2HDMICODEC,
220 PERIPH_ID_SATACOLD,
221 PERIPH_ID_W_RESERVED2,
222 PERIPH_ID_W_RESERVED3,
223 PERIPH_ID_W_RESERVED4,
224 PERIPH_ID_W_RESERVED5,
225 PERIPH_ID_W_RESERVED6,
226 PERIPH_ID_W_RESERVED7,
227
228 /* 136 */
229 PERIPH_ID_CEC,
230 PERIPH_ID_W_RESERVED9,
231 PERIPH_ID_W_RESERVED10,
232 PERIPH_ID_W_RESERVED11,
233 PERIPH_ID_W_RESERVED12,
234 PERIPH_ID_W_RESERVED13,
235 PERIPH_ID_XUSB_PADCTL,
236 PERIPH_ID_W_RESERVED15,
237
238 /* 144 */
239 PERIPH_ID_W_RESERVED16,
240 PERIPH_ID_W_RESERVED17,
241 PERIPH_ID_W_RESERVED18,
242 PERIPH_ID_W_RESERVED19,
243 PERIPH_ID_W_RESERVED20,
244 PERIPH_ID_ENTROPY,
245 PERIPH_ID_DDS,
246 PERIPH_ID_W_RESERVED23,
247
248 /* 152 */
249 PERIPH_ID_W_RESERVED24,
250 PERIPH_ID_W_RESERVED25,
251 PERIPH_ID_W_RESERVED26,
252 PERIPH_ID_DVFS,
253 PERIPH_ID_XUSB_SS,
254 PERIPH_ID_W_RESERVED29,
255 PERIPH_ID_W_RESERVED30,
256 PERIPH_ID_W_RESERVED31,
257
258 PERIPH_ID_X_FIRST,
259 /* X word: 31:0 */
260 PERIPH_ID_SPARE = PERIPH_ID_X_FIRST,
261 PERIPH_ID_X_RESERVED1,
262 PERIPH_ID_X_RESERVED2,
263 PERIPH_ID_X_RESERVED3,
264 PERIPH_ID_CAM_MCLK,
265 PERIPH_ID_CAM_MCLK2,
266 PERIPH_ID_I2C6,
267 PERIPH_ID_X_RESERVED7,
268
269 /* 168 */
270 PERIPH_ID_X_RESERVED8,
271 PERIPH_ID_X_RESERVED9,
272 PERIPH_ID_X_RESERVED10,
273 PERIPH_ID_VIM2_CLK,
274 PERIPH_ID_X_RESERVED12,
275 PERIPH_ID_X_RESERVED13,
276 PERIPH_ID_EMC_DLL,
277 PERIPH_ID_X_RESERVED15,
278
279 /* 176 */
280 PERIPH_ID_HDMI_AUDIO,
281 PERIPH_ID_CLK72MHZ,
282 PERIPH_ID_VIC,
283 PERIPH_ID_X_RESERVED19,
284 PERIPH_ID_X_RESERVED20,
285 PERIPH_ID_DPAUX,
286 PERIPH_ID_SOR0,
287 PERIPH_ID_X_RESERVED23,
288
289 /* 184 */
290 PERIPH_ID_GPU,
291 PERIPH_ID_X_RESERVED25,
292 PERIPH_ID_X_RESERVED26,
293 PERIPH_ID_X_RESERVED27,
294 PERIPH_ID_X_RESERVED28,
295 PERIPH_ID_X_RESERVED29,
296 PERIPH_ID_X_RESERVED30,
297 PERIPH_ID_X_RESERVED31,
298
299 PERIPH_ID_Y_FIRST,
300 /* Y word: 31:0 (192:223) */
301 PERIPH_ID_SPARE1 = PERIPH_ID_Y_FIRST,
302 PERIPH_ID_Y_RESERVED1,
303 PERIPH_ID_Y_RESERVED2,
304 PERIPH_ID_Y_RESERVED3,
305 PERIPH_ID_Y_RESERVED4,
306 PERIPH_ID_Y_RESERVED5,
307 PERIPH_ID_APE,
308 PERIPH_ID_Y_RESERVED7,
309
310 /* 200 */
311 PERIPH_ID_MC_CDPA,
312 PERIPH_ID_Y_RESERVED9,
313 PERIPH_ID_Y_RESERVED10,
314 PERIPH_ID_Y_RESERVED11,
315 PERIPH_ID_Y_RESERVED12,
316 PERIPH_ID_PEX_USB_UPHY,
317 PERIPH_ID_Y_RESERVED14,
318 PERIPH_ID_Y_RESERVED15,
319
320 /* 208 */
321 PERIPH_ID_VI_I2C,
322 PERIPH_ID_Y_RESERVED17,
323 PERIPH_ID_Y_RESERVED18,
324 PERIPH_ID_QSPI,
325 PERIPH_ID_Y_RESERVED20,
326 PERIPH_ID_Y_RESERVED21,
327 PERIPH_ID_Y_RESERVED22,
328 PERIPH_ID_Y_RESERVED23,
329
330 /* 216 */
331 PERIPH_ID_Y_RESERVED24,
332 PERIPH_ID_Y_RESERVED25,
333 PERIPH_ID_Y_RESERVED26,
334 PERIPH_ID_Y_RESERVED27,
335 PERIPH_ID_Y_RESERVED28,
336 PERIPH_ID_Y_RESERVED29,
337 PERIPH_ID_Y_RESERVED30,
338 PERIPH_ID_Y_RESERVED31,
339
340 PERIPH_ID_COUNT,
341 PERIPH_ID_NONE = -1,
342};
343
344enum pll_out_id {
345 PLL_OUT1,
346 PLL_OUT2,
347 PLL_OUT3,
348 PLL_OUT4
349};
350
351/*
352 * Clock peripheral IDs which sadly don't match up with PERIPH_ID. we want
353 * callers to use the PERIPH_ID for all access to peripheral clocks to avoid
354 * confusion bewteen PERIPH_ID_... and PERIPHC_...
355 *
356 * We don't call this CLOCK_PERIPH_ID or PERIPH_CLOCK_ID as it would just be
357 * confusing.
358 */
359enum periphc_internal_id {
360 /* 0x00 */
361 PERIPHC_I2S2,
362 PERIPHC_I2S3,
363 PERIPHC_SPDIF_OUT,
364 PERIPHC_SPDIF_IN,
365 PERIPHC_PWM,
366 PERIPHC_05h,
367 PERIPHC_SBC2,
368 PERIPHC_SBC3,
369
370 /* 0x08 */
371 PERIPHC_08h,
372 PERIPHC_I2C1,
373 PERIPHC_I2C5,
374 PERIPHC_0bh,
375 PERIPHC_0ch,
376 PERIPHC_SBC1,
377 PERIPHC_DISP1,
378 PERIPHC_DISP2,
379
380 /* 0x10 */
381 PERIPHC_10h,
382 PERIPHC_11h,
383 PERIPHC_VI,
384 PERIPHC_13h,
385 PERIPHC_SDMMC1,
386 PERIPHC_SDMMC2,
387 PERIPHC_G3D,
388 PERIPHC_G2D,
389
390 /* 0x18 */
391 PERIPHC_18h,
392 PERIPHC_SDMMC4,
393 PERIPHC_VFIR,
394 PERIPHC_1Bh,
395 PERIPHC_1Ch,
396 PERIPHC_HSI,
397 PERIPHC_UART1,
398 PERIPHC_UART2,
399
400 /* 0x20 */
401 PERIPHC_HOST1X,
402 PERIPHC_21h,
403 PERIPHC_22h,
404 PERIPHC_HDMI,
405 PERIPHC_24h,
406 PERIPHC_25h,
407 PERIPHC_I2C2,
408 PERIPHC_EMC,
409
410 /* 0x28 */
411 PERIPHC_UART3,
412 PERIPHC_29h,
413 PERIPHC_VI_SENSOR,
414 PERIPHC_2bh,
415 PERIPHC_2ch,
416 PERIPHC_SBC4,
417 PERIPHC_I2C3,
418 PERIPHC_SDMMC3,
419
420 /* 0x30 */
421 PERIPHC_UART4,
422 PERIPHC_UART5,
423 PERIPHC_VDE,
424 PERIPHC_OWR,
425 PERIPHC_NOR,
426 PERIPHC_CSITE,
427 PERIPHC_I2S1,
428 PERIPHC_DTV,
429
430 /* 0x38 */
431 PERIPHC_38h,
432 PERIPHC_39h,
433 PERIPHC_3ah,
434 PERIPHC_3bh,
435 PERIPHC_MSENC,
436 PERIPHC_TSEC,
437 PERIPHC_3eh,
438 PERIPHC_OSC,
439
440 PERIPHC_VW_FIRST,
441 /* 0x40 */
442 PERIPHC_40h = PERIPHC_VW_FIRST,
443 PERIPHC_MSELECT,
444 PERIPHC_TSENSOR,
445 PERIPHC_I2S4,
446 PERIPHC_I2S5,
447 PERIPHC_I2C4,
448 PERIPHC_SBC5,
449 PERIPHC_SBC6,
450
451 /* 0x48 */
452 PERIPHC_AUDIO,
453 PERIPHC_49h,
454 PERIPHC_4ah,
455 PERIPHC_4bh,
456 PERIPHC_4ch,
457 PERIPHC_HDA2CODEC2X,
458 PERIPHC_ACTMON,
459 PERIPHC_EXTPERIPH1,
460
461 /* 0x50 */
462 PERIPHC_EXTPERIPH2,
463 PERIPHC_EXTPERIPH3,
464 PERIPHC_52h,
465 PERIPHC_I2CSLOW,
466 PERIPHC_SYS,
467 PERIPHC_55h,
468 PERIPHC_56h,
469 PERIPHC_57h,
470
471 /* 0x58 */
472 PERIPHC_58h,
473 PERIPHC_59h,
474 PERIPHC_5ah,
475 PERIPHC_5bh,
476 PERIPHC_SATAOOB,
477 PERIPHC_SATA,
478 PERIPHC_HDA, /* 0x428 */
479 PERIPHC_5fh,
480
481 PERIPHC_X_FIRST,
482 /* 0x60 */
483 PERIPHC_XUSB_CORE_HOST = PERIPHC_X_FIRST, /* 0x600 */
484 PERIPHC_XUSB_FALCON,
485 PERIPHC_XUSB_FS,
486 PERIPHC_XUSB_CORE_DEV,
487 PERIPHC_XUSB_SS,
488 PERIPHC_CILAB,
489 PERIPHC_CILCD,
490 PERIPHC_CILE,
491
492 /* 0x68 */
493 PERIPHC_DSIA_LP,
494 PERIPHC_DSIB_LP,
495 PERIPHC_ENTROPY,
496 PERIPHC_DVFS_REF,
497 PERIPHC_DVFS_SOC,
498 PERIPHC_TRACECLKIN,
499 PERIPHC_6Eh,
500 PERIPHC_6Fh,
501
502 /* 0x70 */
503 PERIPHC_EMC_LATENCY,
504 PERIPHC_SOC_THERM,
505 PERIPHC_72h,
506 PERIPHC_73h,
507 PERIPHC_74h,
508 PERIPHC_75h,
509 PERIPHC_VI_SENSOR2,
510 PERIPHC_I2C6,
511
512 /* 0x78 */
513 PERIPHC_78h,
514 PERIPHC_EMC_DLL,
515 PERIPHC_7ah,
516 PERIPHC_CLK72MHZ,
517 PERIPHC_7ch,
518 PERIPHC_7dh,
519 PERIPHC_VIC,
520 PERIPHC_7fh,
521
522 PERIPHC_Y_FIRST,
523 /* 0x80 */
524 PERIPHC_SDMMC_LEGACY_TM = PERIPHC_Y_FIRST, /* 0x694 */
525 PERIPHC_NVDEC, /* 0x698 */
526 PERIPHC_NVJPG, /* 0x69c */
527 PERIPHC_NVENC, /* 0x6a0 */
528 PERIPHC_84h,
529 PERIPHC_85h,
530 PERIPHC_86h,
531 PERIPHC_87h,
532
533 /* 0x88 */
534 PERIPHC_88h,
535 PERIPHC_89h,
536 PERIPHC_DMIC3, /* 0x6bc: */
537 PERIPHC_APE, /* 0x6c0: */
538 PERIPHC_QSPI, /* 0x6c4: */
539 PERIPHC_VI_I2C, /* 0x6c8: */
540 PERIPHC_USB2_HSIC_TRK, /* 0x6cc: */
541 PERIPHC_PEX_SATA_USB_RX_BYP, /* 0x6d0: */
542
543 /* 0x90 */
544 PERIPHC_MAUD, /* 0x6d4: */
545 PERIPHC_TSECB, /* 0x6d8: */
546
547 PERIPHC_COUNT,
548 PERIPHC_NONE = -1,
549};
550
551/* Converts a clock number to a clock register: 0=L, 1=H, 2=U, 0=V, 1=W */
552#define PERIPH_REG(id) \
553 (id < PERIPH_ID_VW_FIRST) ? \
554 ((id) >> 5) : ((id - PERIPH_ID_VW_FIRST) >> 5)
555
556/* Mask value for a clock (within PERIPH_REG(id)) */
557#define PERIPH_MASK(id) (1 << ((id) & 0x1f))
558
559/* return 1 if a PLL ID is in range */
560#define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && (id) < CLOCK_ID_COUNT)
561
562/* return 1 if a peripheral ID is in range */
563#define clock_periph_id_isvalid(id) ((id) >= PERIPH_ID_FIRST && \
564 (id) < PERIPH_ID_COUNT)
565
566#endif /* _TEGRA210_CLOCK_TABLES_H_ */