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git01.mediatek.com / filogic / uboot / 7724a57460170a090eb2d1da7be957c74dcb3645 / . / drivers / mtd / nand / spi / paragon.c
blob: 0c123930f149e929576d76aca8abee4f809be029 [file] [log] [blame]
Mikhail Kshevetskiy2a1e78b2023-01-10 12:58:40 +0100[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2019 Jeff Kletsky
4 *
5 * Author: Jeff Kletsky <git-commits@allycomm.com>
6 */
7
8#ifndef __UBOOT__
9#include <linux/device.h>
10#include <linux/kernel.h>
11#endif
12#include <linux/mtd/spinand.h>
13
14
15#define SPINAND_MFR_PARAGON 0xa1
16
17
18#define PN26G0XA_STATUS_ECC_BITMASK (3 << 4)
19
20#define PN26G0XA_STATUS_ECC_NONE_DETECTED (0 << 4)
21#define PN26G0XA_STATUS_ECC_1_7_CORRECTED (1 << 4)
22#define PN26G0XA_STATUS_ECC_ERRORED (2 << 4)
23#define PN26G0XA_STATUS_ECC_8_CORRECTED (3 << 4)
24
25
26static SPINAND_OP_VARIANTS(read_cache_variants,
27 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
28 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
29 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
30 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
31 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
32 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
33
34static SPINAND_OP_VARIANTS(write_cache_variants,
35 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
36 SPINAND_PROG_LOAD(true, 0, NULL, 0));
37
38static SPINAND_OP_VARIANTS(update_cache_variants,
39 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
40 SPINAND_PROG_LOAD(false, 0, NULL, 0));
41
42
43static int pn26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section,
44 struct mtd_oob_region *region)
45{
46 if (section > 3)
47 return -ERANGE;
48
49 region->offset = 6 + (15 * section); /* 4 BBM + 2 user bytes */
50 region->length = 13;
51
52 return 0;
53}
54
55static int pn26g0xa_ooblayout_free(struct mtd_info *mtd, int section,
56 struct mtd_oob_region *region)
57{
58 if (section > 4)
59 return -ERANGE;
60
61 if (section == 4) {
62 region->offset = 64;
63 region->length = 64;
64 } else {
65 region->offset = 4 + (15 * section);
66 region->length = 2;
67 }
68
69 return 0;
70}
71
72static int pn26g0xa_ecc_get_status(struct spinand_device *spinand,
73 u8 status)
74{
75 switch (status & PN26G0XA_STATUS_ECC_BITMASK) {
76 case PN26G0XA_STATUS_ECC_NONE_DETECTED:
77 return 0;
78
79 case PN26G0XA_STATUS_ECC_1_7_CORRECTED:
80 return 7; /* Return upper limit by convention */
81
82 case PN26G0XA_STATUS_ECC_8_CORRECTED:
83 return 8;
84
85 case PN26G0XA_STATUS_ECC_ERRORED:
86 return -EBADMSG;
87
88 default:
89 break;
90 }
91
92 return -EINVAL;
93}
94
95static const struct mtd_ooblayout_ops pn26g0xa_ooblayout = {
96 .ecc = pn26g0xa_ooblayout_ecc,
97 .rfree = pn26g0xa_ooblayout_free,
98};
99
100
101static const struct spinand_info paragon_spinand_table[] = {
102 SPINAND_INFO("PN26G01A",
103 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xe1),
104 NAND_MEMORG(1, 2048, 128, 64, 1024, 21, 1, 1, 1),
105 NAND_ECCREQ(8, 512),
106 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
107 &write_cache_variants,
108 &update_cache_variants),
109 0,
110 SPINAND_ECCINFO(&pn26g0xa_ooblayout,
111 pn26g0xa_ecc_get_status)),
112 SPINAND_INFO("PN26G02A",
113 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xe2),
114 NAND_MEMORG(1, 2048, 128, 64, 2048, 41, 1, 1, 1),
115 NAND_ECCREQ(8, 512),
116 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
117 &write_cache_variants,
118 &update_cache_variants),
119 0,
120 SPINAND_ECCINFO(&pn26g0xa_ooblayout,
121 pn26g0xa_ecc_get_status)),
122};
123
124static const struct spinand_manufacturer_ops paragon_spinand_manuf_ops = {
125};
126
127const struct spinand_manufacturer paragon_spinand_manufacturer = {
128 .id = SPINAND_MFR_PARAGON,
129 .name = "Paragon",
130 .chips = paragon_spinand_table,
131 .nchips = ARRAY_SIZE(paragon_spinand_table),
132 .ops = &paragon_spinand_manuf_ops,
133};