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trem0053e3c2013-09-10 22:08:39 +02001/*
2 *
3 * Configuration settings for the Armadeus Project motherboard APF27
4 *
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
trem0053e3c2013-09-10 22:08:39 +020013#define CONFIG_ENV_VERSION 10
trem0053e3c2013-09-10 22:08:39 +020014#define CONFIG_BOARD_NAME apf27
15
16/*
17 * SoC configurations
18 */
Masahiro Yamada4fb5d072014-11-06 14:59:36 +090019#define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
trem0053e3c2013-09-10 22:08:39 +020020#define CONFIG_MACH_TYPE 1698 /* APF27 */
trem0053e3c2013-09-10 22:08:39 +020021
22/*
23 * Enable the call to miscellaneous platform dependent initialization.
24 */
trem0053e3c2013-09-10 22:08:39 +020025
26/*
trem0053e3c2013-09-10 22:08:39 +020027 * SPL
28 */
trem0053e3c2013-09-10 22:08:39 +020029#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
30#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
31#define CONFIG_SPL_MAX_SIZE 2048
32#define CONFIG_SPL_TEXT_BASE 0xA0000000
33
34/* NAND boot config */
trem0053e3c2013-09-10 22:08:39 +020035#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
36#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
37#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
38#define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
39
40/*
41 * BOOTP options
42 */
43#define CONFIG_BOOTP_SUBNETMASK
44#define CONFIG_BOOTP_GATEWAY
45#define CONFIG_BOOTP_HOSTNAME
46#define CONFIG_BOOTP_BOOTPATH
47#define CONFIG_BOOTP_BOOTFILESIZE
48#define CONFIG_BOOTP_DNS
49#define CONFIG_BOOTP_DNS2
50
51#define CONFIG_HOSTNAME CONFIG_BOARD_NAME
52#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
53
54/*
55 * U-Boot Commands
56 */
trem0053e3c2013-09-10 22:08:39 +020057#define CONFIG_CMD_EEPROM
trem0053e3c2013-09-10 22:08:39 +020058#define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
trem0053e3c2013-09-10 22:08:39 +020059#define CONFIG_CMD_MTDPARTS /* MTD partition support */
60#define CONFIG_CMD_NAND /* NAND support */
61#define CONFIG_CMD_NAND_LOCK_UNLOCK
62#define CONFIG_CMD_NAND_TRIMFFS
trem0053e3c2013-09-10 22:08:39 +020063#define CONFIG_CMD_UBIFS
64
65/*
66 * Memory configurations
67 */
68#define CONFIG_NR_DRAM_POPULATED 1
69#define CONFIG_NR_DRAM_BANKS 2
70
71#define ACFG_SDRAM_MBYTE_SYZE 64
72
73#define PHYS_SDRAM_1 0xA0000000
74#define PHYS_SDRAM_2 0xB0000000
75#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
76#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
77#define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
78#define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
79
80#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
81 + PHYS_SDRAM_1_SIZE - 0x0100000)
82
83#define CONFIG_SYS_TEXT_BASE 0xA0000800
84
85/*
86 * FLASH organization
87 */
88#define ACFG_MONITOR_OFFSET 0x00000000
89#define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
90#define CONFIG_ENV_IS_IN_NAND
91#define CONFIG_ENV_OVERWRITE
92#define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
93#define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
94#define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
95#define CONFIG_ENV_OFFSET_REDUND \
96 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
97#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
98#define CONFIG_FIRMWARE_OFFSET 0x00200000
99#define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
100#define CONFIG_KERNEL_OFFSET 0x00300000
101#define CONFIG_ROOTFS_OFFSET 0x00800000
102
103#define CONFIG_MTDMAP "mxc_nand.0"
104#define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
105#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
106 ":1M(u-boot)ro," \
107 "512K(env)," \
108 "512K(env2)," \
109 "512K(firmware)," \
110 "512K(dtb)," \
111 "5M(kernel)," \
112 "-(rootfs)"
113
114/*
115 * U-Boot general configurations
116 */
117#define CONFIG_SYS_LONGHELP
trem0053e3c2013-09-10 22:08:39 +0200118#define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
119#define CONFIG_SYS_PBSIZE \
120 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
121 /* Print buffer size */
122#define CONFIG_SYS_MAXARGS 16 /* max command args */
123#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
124 /* Boot argument buffer size */
125#define CONFIG_AUTO_COMPLETE
126#define CONFIG_CMDLINE_EDITING
trem0053e3c2013-09-10 22:08:39 +0200127#define CONFIG_ENV_VARS_UBOOT_CONFIG
128#define CONFIG_PREBOOT "run check_flash check_env;"
129
trem0053e3c2013-09-10 22:08:39 +0200130/*
131 * Boot Linux
132 */
133#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
134#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
135#define CONFIG_INITRD_TAG /* send initrd params */
136
trem0053e3c2013-09-10 22:08:39 +0200137#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
138#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
139 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
140 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
141
142#define ACFG_CONSOLE_DEV ttySMX0
143#define CONFIG_BOOTCOMMAND "run ubifsboot"
144#define CONFIG_SYS_AUTOLOAD "no"
145/*
146 * Default load address for user programs and kernel
147 */
148#define CONFIG_LOADADDR 0xA0000000
149#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
150
151/*
152 * Extra Environments
153 */
154#define CONFIG_EXTRA_ENV_SETTINGS \
155 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
156 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
157 "mtdparts=" MTDPARTS_DEFAULT "\0" \
158 "partition=nand0,6\0" \
159 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
160 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
161 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
162 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
163 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
164 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
165 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
166 "kernel_addr_r=A0000000\0" \
167 "check_env=if test -n ${flash_env_version}; " \
168 "then env default env_version; " \
169 "else env set flash_env_version ${env_version}; env save; "\
170 "fi; " \
171 "if itest ${flash_env_version} < ${env_version}; then " \
172 "echo \"*** Warning - Environment version" \
173 " change suggests: run flash_reset_env; reset\"; "\
174 "env default flash_reset_env; "\
175 "fi; \0" \
176 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
177 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
178 "echo Flash environment variables erased!\0" \
179 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
180 "-u-boot-with-spl.bin\0" \
181 "flash_uboot=nand unlock ${u-boot_addr} ;" \
182 "nand erase.part u-boot;" \
183 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
184 "then nand lock; nand unlock ${env_addr};" \
185 "echo Flashing of uboot succeed;" \
186 "else echo Flashing of uboot failed;" \
187 "fi; \0" \
188 "update_uboot=run download_uboot flash_uboot\0" \
189 "download_env=tftpboot ${loadaddr} ${board_name}" \
190 "-u-boot-env.txt\0" \
191 "flash_env=env import -t ${loadaddr}; env save; \0" \
192 "update_env=run download_env flash_env\0" \
193 "update_all=run update_env update_uboot\0" \
194 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
195
196/*
197 * Serial Driver
198 */
199#define CONFIG_MXC_UART
200#define CONFIG_CONS_INDEX 1
trem0053e3c2013-09-10 22:08:39 +0200201#define CONFIG_MXC_UART_BASE UART1_BASE
202
203/*
204 * GPIO
205 */
206#define CONFIG_MXC_GPIO
207
208/*
209 * NOR
210 */
211
212/*
213 * NAND
214 */
215#define CONFIG_NAND_MXC
216
217#define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
218#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
219#define CONFIG_SYS_MAX_NAND_DEVICE 1
220
221#define CONFIG_MXC_NAND_HWECC
222#define CONFIG_SYS_NAND_LARGEPAGE
223#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
224#define CONFIG_SYS_NAND_PAGE_SIZE 2048
225#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
226#define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
227 CONFIG_SYS_NAND_PAGE_SIZE
228#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
229#define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
230#define NAND_MAX_CHIPS 1
231
232#define CONFIG_FLASH_SHOW_PROGRESS 45
233#define CONFIG_SYS_NAND_QUIET 1
234
235/*
236 * Partitions & Filsystems
237 */
238#define CONFIG_MTD_DEVICE
239#define CONFIG_MTD_PARTITIONS
trem0053e3c2013-09-10 22:08:39 +0200240#define CONFIG_SUPPORT_VFAT
241
242/*
243 * UBIFS
244 */
245#define CONFIG_RBTREE
246#define CONFIG_LZO
247
248/*
249 * Ethernet (on SOC imx FEC)
250 */
251#define CONFIG_FEC_MXC
252#define CONFIG_FEC_MXC_PHYADDR 0x1f
253#define CONFIG_MII /* MII PHY management */
254
255/*
trem97852892013-09-10 22:08:40 +0200256 * FPGA
257 */
258#ifndef CONFIG_SPL_BUILD
259#define CONFIG_FPGA
260#endif
261#define CONFIG_FPGA_COUNT 1
262#define CONFIG_FPGA_XILINX
263#define CONFIG_FPGA_SPARTAN3
264#define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
265#define CONFIG_SYS_FPGA_PROG_FEEDBACK
266#define CONFIG_SYS_FPGA_CHECK_CTRLC
267#define CONFIG_SYS_FPGA_CHECK_ERROR
268
269/*
trem0053e3c2013-09-10 22:08:39 +0200270 * Fuses - IIM
271 */
272#ifdef CONFIG_CMD_IMX_FUSE
273#define IIM_MAC_BANK 0
274#define IIM_MAC_ROW 5
275#define IIM0_SCC_KEY 11
276#define IIM1_SUID 1
277#endif
278
279/*
280 * I2C
281 */
282
283#ifdef CONFIG_CMD_I2C
trem03997412013-09-21 18:13:36 +0200284#define CONFIG_SYS_I2C
285#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +0200286#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
287#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
trem03997412013-09-21 18:13:36 +0200288#define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
289#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
290#define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
291#define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
trem0053e3c2013-09-10 22:08:39 +0200292#define CONFIG_SYS_I2C_NOPROBES { }
293
294#ifdef CONFIG_CMD_EEPROM
295# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
296# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
297#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
298#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
299#endif /* CONFIG_CMD_EEPROM */
300#endif /* CONFIG_CMD_I2C */
301
302/*
303 * SD/MMC
304 */
305#ifdef CONFIG_CMD_MMC
trem0053e3c2013-09-10 22:08:39 +0200306#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
307#endif
308
309/*
310 * RTC
311 */
312#ifdef CONFIG_CMD_DATE
313#define CONFIG_RTC_DS1374
314#define CONFIG_SYS_RTC_BUS_NUM 0
315#endif /* CONFIG_CMD_DATE */
316
317/*
trem0053e3c2013-09-10 22:08:39 +0200318 * PLL
319 *
320 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
321 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
322 */
323#define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
324
325#if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
326/* micron 64MB */
327#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
328#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
329#endif
330
331#if (ACFG_SDRAM_MBYTE_SYZE == 128)
332/* micron 128MB */
333#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
334#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
335#endif
336
337#if (ACFG_SDRAM_MBYTE_SYZE == 256)
338/* micron 256MB */
339#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
340#define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
341#endif
342
343#endif /* __CONFIG_H */