blob: 22cfa4dc34998be197543111f32eb2029a09ecde [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001menu "mpc85xx CPU"
2 depends on MPC85xx
3
4config SYS_CPU
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09005 default "mpc85xx"
6
Simon Glass9fdc0de2017-05-17 03:25:15 -06007config CMD_ERRATA
8 bool "Enable the 'errata' command"
9 depends on MPC85xx
10 default y
11 help
12 This enables the 'errata' command which displays a list of errata
13 work-arounds which are enabled for the current board.
14
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090015choice
16 prompt "Target select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050017 optional
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090018
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090019config TARGET_SOCRATES
20 bool "Support socrates"
York Sun5ac012a2016-11-15 13:57:15 -080021 select ARCH_MPC8544
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090022
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090023config TARGET_P3041DS
24 bool "Support P3041DS"
Masahiro Yamada653e9fe2016-07-25 19:56:03 +090025 select PHYS_64BIT
York Sundf70d062016-11-18 11:20:40 -080026 select ARCH_P3041
Tom Rini22d567e2017-01-22 19:43:11 -050027 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Simon Glass203b3ab2017-06-14 21:28:24 -060028 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090029 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090030
31config TARGET_P4080DS
32 bool "Support P4080DS"
Masahiro Yamada653e9fe2016-07-25 19:56:03 +090033 select PHYS_64BIT
York Sun84be8a92016-11-18 11:24:40 -080034 select ARCH_P4080
Tom Rini22d567e2017-01-22 19:43:11 -050035 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Simon Glass203b3ab2017-06-14 21:28:24 -060036 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090037 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090038
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090039config TARGET_P5040DS
40 bool "Support P5040DS"
Masahiro Yamada653e9fe2016-07-25 19:56:03 +090041 select PHYS_64BIT
York Suna3c5b662016-11-18 11:39:36 -080042 select ARCH_P5040
Tom Rini22d567e2017-01-22 19:43:11 -050043 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Simon Glass203b3ab2017-06-14 21:28:24 -060044 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090045 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090046
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090047config TARGET_MPC8541CDS
48 bool "Support MPC8541CDS"
York Sunbf820c02016-11-16 11:18:31 -080049 select ARCH_MPC8541
Rajesh Bhagat6d072982021-02-15 09:46:14 +010050 select FSL_VIA
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090051
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090052config TARGET_MPC8548CDS
53 bool "Support MPC8548CDS"
York Sunefc49e02016-11-15 13:52:34 -080054 select ARCH_MPC8548
Rajesh Bhagat6d072982021-02-15 09:46:14 +010055 select FSL_VIA
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090056
57config TARGET_MPC8555CDS
58 bool "Support MPC8555CDS"
York Sun32be34d2016-11-16 11:23:23 -080059 select ARCH_MPC8555
Rajesh Bhagat6d072982021-02-15 09:46:14 +010060 select FSL_VIA
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090061
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090062config TARGET_MPC8568MDS
63 bool "Support MPC8568MDS"
York Suna0d4b582016-11-16 11:32:17 -080064 select ARCH_MPC8568
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090065
York Sun7f945ca2016-11-16 13:30:06 -080066config TARGET_P1010RDB_PA
67 bool "Support P1010RDB_PA"
68 select ARCH_P1010
Tom Rini22d567e2017-01-22 19:43:11 -050069 select BOARD_LATE_INIT if CHAIN_OF_TRUST
York Sun7f945ca2016-11-16 13:30:06 -080070 select SUPPORT_SPL
71 select SUPPORT_TPL
Simon Glass4590d4e2017-05-17 03:25:10 -060072 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -060073 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090074 imply PANIC_HANG
York Sun7f945ca2016-11-16 13:30:06 -080075
76config TARGET_P1010RDB_PB
77 bool "Support P1010RDB_PB"
York Sun24f88b32016-11-16 13:08:52 -080078 select ARCH_P1010
Tom Rini22d567e2017-01-22 19:43:11 -050079 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada6e0971b2014-10-20 17:45:56 +090080 select SUPPORT_SPL
Masahiro Yamadaf5ebc992014-10-20 17:45:57 +090081 select SUPPORT_TPL
Simon Glass4590d4e2017-05-17 03:25:10 -060082 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -060083 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090084 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090085
York Sun443108bf2016-11-17 13:52:44 -080086config TARGET_P1020RDB_PC
87 bool "Support P1020RDB-PC"
88 select SUPPORT_SPL
89 select SUPPORT_TPL
York Sunaf2dc812016-11-18 10:02:14 -080090 select ARCH_P1020
Simon Glass4590d4e2017-05-17 03:25:10 -060091 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -060092 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090093 imply PANIC_HANG
York Sun443108bf2016-11-17 13:52:44 -080094
York Sun06732382016-11-17 13:53:33 -080095config TARGET_P1020RDB_PD
96 bool "Support P1020RDB-PD"
97 select SUPPORT_SPL
98 select SUPPORT_TPL
York Sunaf2dc812016-11-18 10:02:14 -080099 select ARCH_P1020
Simon Glass4590d4e2017-05-17 03:25:10 -0600100 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -0600101 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900102 imply PANIC_HANG
York Sun06732382016-11-17 13:53:33 -0800103
York Sun9c01ff22016-11-17 14:19:18 -0800104config TARGET_P2020RDB
105 bool "Support P2020RDB-PC"
106 select SUPPORT_SPL
107 select SUPPORT_TPL
York Sun4b08dd72016-11-18 11:08:43 -0800108 select ARCH_P2020
Simon Glass4590d4e2017-05-17 03:25:10 -0600109 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -0600110 imply CMD_SATA
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +0200111 imply SATA_SIL
York Sun9c01ff22016-11-17 14:19:18 -0800112
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900113config TARGET_P2041RDB
114 bool "Support P2041RDB"
York Sun5786fca2016-11-18 11:15:21 -0800115 select ARCH_P2041
Tom Rini22d567e2017-01-22 19:43:11 -0500116 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900117 select PHYS_64BIT
Simon Glass203b3ab2017-06-14 21:28:24 -0600118 imply CMD_SATA
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200119 imply FSL_SATA
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900120
121config TARGET_QEMU_PPCE500
122 bool "Support qemu-ppce500"
York Sun51e91e82016-11-18 12:29:51 -0800123 select ARCH_QEMU_E500
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900124 select PHYS_64BIT
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900125
York Suna5ca1422016-11-18 12:45:44 -0800126config TARGET_T1023RDB
127 bool "Support T1023RDB"
York Sunbcee92e2016-11-18 12:35:47 -0800128 select ARCH_T1023
Tom Rini22d567e2017-01-22 19:43:11 -0500129 select BOARD_LATE_INIT if CHAIN_OF_TRUST
York Suna5ca1422016-11-18 12:45:44 -0800130 select SUPPORT_SPL
131 select PHYS_64BIT
Rajesh Bhagatba2414f2019-02-01 05:22:01 +0000132 select FSL_DDR_INTERACTIVE
Simon Glass4590d4e2017-05-17 03:25:10 -0600133 imply CMD_EEPROM
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900134 imply PANIC_HANG
York Suna5ca1422016-11-18 12:45:44 -0800135
136config TARGET_T1024RDB
137 bool "Support T1024RDB"
York Sun7d29dd62016-11-18 13:01:34 -0800138 select ARCH_T1024
Tom Rini22d567e2017-01-22 19:43:11 -0500139 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Shengzhou Liu49912402014-11-24 17:11:56 +0800140 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900141 select PHYS_64BIT
Rajesh Bhagatba2414f2019-02-01 05:22:01 +0000142 select FSL_DDR_INTERACTIVE
Simon Glass4590d4e2017-05-17 03:25:10 -0600143 imply CMD_EEPROM
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900144 imply PANIC_HANG
Shengzhou Liu49912402014-11-24 17:11:56 +0800145
York Sun1d564e752016-11-18 13:19:39 -0800146config TARGET_T1042RDB
147 bool "Support T1042RDB"
York Sun2d7b2d42016-11-18 13:36:39 -0800148 select ARCH_T1042
Tom Rini22d567e2017-01-22 19:43:11 -0500149 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada6e0971b2014-10-20 17:45:56 +0900150 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900151 select PHYS_64BIT
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900152
York Sund08610d2016-11-21 11:04:34 -0800153config TARGET_T1042D4RDB
154 bool "Support T1042D4RDB"
155 select ARCH_T1042
Tom Rini22d567e2017-01-22 19:43:11 -0500156 select BOARD_LATE_INIT if CHAIN_OF_TRUST
York Sund08610d2016-11-21 11:04:34 -0800157 select SUPPORT_SPL
158 select PHYS_64BIT
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900159 imply PANIC_HANG
York Sund08610d2016-11-21 11:04:34 -0800160
York Sune9c8dcf2016-11-18 13:44:00 -0800161config TARGET_T1042RDB_PI
162 bool "Support T1042RDB_PI"
163 select ARCH_T1042
Tom Rini22d567e2017-01-22 19:43:11 -0500164 select BOARD_LATE_INIT if CHAIN_OF_TRUST
York Sune9c8dcf2016-11-18 13:44:00 -0800165 select SUPPORT_SPL
166 select PHYS_64BIT
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900167 imply PANIC_HANG
York Sune9c8dcf2016-11-18 13:44:00 -0800168
York Sund1a6c0f2016-11-21 12:46:58 -0800169config TARGET_T2080QDS
170 bool "Support T2080QDS"
York Sune20c6852016-11-21 12:54:19 -0800171 select ARCH_T2080
Tom Rini22d567e2017-01-22 19:43:11 -0500172 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada6e0971b2014-10-20 17:45:56 +0900173 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900174 select PHYS_64BIT
Rajesh Bhagatba2414f2019-02-01 05:22:01 +0000175 select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
176 select FSL_DDR_INTERACTIVE
Peng Ma34bed5d2019-12-23 09:28:12 +0000177 imply CMD_SATA
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900178
York Sun58459252016-11-21 12:57:22 -0800179config TARGET_T2080RDB
180 bool "Support T2080RDB"
York Sune20c6852016-11-21 12:54:19 -0800181 select ARCH_T2080
Tom Rini22d567e2017-01-22 19:43:11 -0500182 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada6e0971b2014-10-20 17:45:56 +0900183 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900184 select PHYS_64BIT
Simon Glass203b3ab2017-06-14 21:28:24 -0600185 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900186 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900187
York Sun50417a92016-11-21 13:26:52 -0800188config TARGET_T4160RDB
189 bool "Support T4160RDB"
York Sunc7ea9242016-11-21 13:31:34 -0800190 select ARCH_T4160
York Sun50417a92016-11-21 13:26:52 -0800191 select SUPPORT_SPL
192 select PHYS_64BIT
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900193 imply PANIC_HANG
York Sun50417a92016-11-21 13:26:52 -0800194
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900195config TARGET_T4240RDB
196 bool "Support T4240RDB"
York Sun0fad3262016-11-21 13:35:41 -0800197 select ARCH_T4240
Chunhe Lan66cba6b2015-03-20 17:08:54 +0800198 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900199 select PHYS_64BIT
Rajesh Bhagatba2414f2019-02-01 05:22:01 +0000200 select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
Simon Glass203b3ab2017-06-14 21:28:24 -0600201 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900202 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900203
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900204config TARGET_KMP204X
205 bool "Support kmp204x"
Pascal Linder305329f2019-06-18 13:27:47 +0200206 select VENDOR_KM
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900207
Niel Fouriedb7241d2021-01-21 13:19:20 +0100208config TARGET_KMCENT2
209 bool "Support kmcent2"
210 select VENDOR_KM
211
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900212config TARGET_XPEDITE520X
213 bool "Support xpedite520x"
York Sunefc49e02016-11-15 13:52:34 -0800214 select ARCH_MPC8548
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900215
216config TARGET_XPEDITE537X
217 bool "Support xpedite537x"
York Sun018874e2016-11-16 11:39:20 -0800218 select ARCH_MPC8572
York Sund297d392016-12-28 08:43:40 -0800219# Use DDR3 controller with DDR2 DIMMs on this board
220 select SYS_FSL_DDRC_GEN3
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900221
222config TARGET_XPEDITE550X
223 bool "Support xpedite550x"
York Sun4b08dd72016-11-18 11:08:43 -0800224 select ARCH_P2020
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900225
Oleksandr G Zhadan19ac6882015-04-29 16:57:39 -0400226config TARGET_UCP1020
227 bool "Support uCP1020"
York Sunaf2dc812016-11-18 10:02:14 -0800228 select ARCH_P1020
Simon Glass203b3ab2017-06-14 21:28:24 -0600229 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900230 imply PANIC_HANG
Oleksandr G Zhadan19ac6882015-04-29 16:57:39 -0400231
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900232endchoice
233
York Sunfda566d2016-11-18 11:56:57 -0800234config ARCH_B4420
235 bool
York Sunaf5495a2016-12-28 08:43:27 -0800236 select E500MC
York Sunf4e8a752016-12-28 08:43:48 -0800237 select E6500
York Sune7a6eaf2016-12-02 10:44:34 -0800238 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800239 select SYS_FSL_DDR_VER_47
York Sunbe735532016-12-28 08:43:43 -0800240 select SYS_FSL_ERRATUM_A004477
241 select SYS_FSL_ERRATUM_A005871
242 select SYS_FSL_ERRATUM_A006379
243 select SYS_FSL_ERRATUM_A006384
244 select SYS_FSL_ERRATUM_A006475
245 select SYS_FSL_ERRATUM_A006593
246 select SYS_FSL_ERRATUM_A007075
247 select SYS_FSL_ERRATUM_A007186
248 select SYS_FSL_ERRATUM_A007212
249 select SYS_FSL_ERRATUM_A009942
York Sund297d392016-12-28 08:43:40 -0800250 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800251 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800252 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800253 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800254 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800255 select SYS_PPC64
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530256 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600257 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400258 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600259 imply CMD_REGINFO
York Sunfda566d2016-11-18 11:56:57 -0800260
York Sun68eaa9a2016-11-18 11:44:43 -0800261config ARCH_B4860
262 bool
York Sunaf5495a2016-12-28 08:43:27 -0800263 select E500MC
York Sunf4e8a752016-12-28 08:43:48 -0800264 select E6500
York Sune7a6eaf2016-12-02 10:44:34 -0800265 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800266 select SYS_FSL_DDR_VER_47
York Sunbe735532016-12-28 08:43:43 -0800267 select SYS_FSL_ERRATUM_A004477
268 select SYS_FSL_ERRATUM_A005871
269 select SYS_FSL_ERRATUM_A006379
270 select SYS_FSL_ERRATUM_A006384
271 select SYS_FSL_ERRATUM_A006475
272 select SYS_FSL_ERRATUM_A006593
273 select SYS_FSL_ERRATUM_A007075
274 select SYS_FSL_ERRATUM_A007186
275 select SYS_FSL_ERRATUM_A007212
Darwin Dingela56d6c02016-10-25 09:48:01 +1300276 select SYS_FSL_ERRATUM_A007907
York Sunbe735532016-12-28 08:43:43 -0800277 select SYS_FSL_ERRATUM_A009942
York Sund297d392016-12-28 08:43:40 -0800278 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800279 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800280 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800281 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800282 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800283 select SYS_PPC64
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530284 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600285 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400286 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600287 imply CMD_REGINFO
York Sun68eaa9a2016-11-18 11:44:43 -0800288
York Suna80bdf72016-11-15 14:09:50 -0800289config ARCH_BSC9131
290 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800291 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800292 select SYS_FSL_DDR_VER_44
York Sunbe735532016-12-28 08:43:43 -0800293 select SYS_FSL_ERRATUM_A004477
294 select SYS_FSL_ERRATUM_A005125
York Sun097e3602016-12-28 08:43:42 -0800295 select SYS_FSL_ERRATUM_ESDHC111
York Sund297d392016-12-28 08:43:40 -0800296 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800297 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800298 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800299 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530300 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600301 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400302 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600303 imply CMD_REGINFO
York Suna80bdf72016-11-15 14:09:50 -0800304
305config ARCH_BSC9132
306 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800307 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800308 select SYS_FSL_DDR_VER_46
York Sunbe735532016-12-28 08:43:43 -0800309 select SYS_FSL_ERRATUM_A004477
310 select SYS_FSL_ERRATUM_A005125
311 select SYS_FSL_ERRATUM_A005434
York Sun097e3602016-12-28 08:43:42 -0800312 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800313 select SYS_FSL_ERRATUM_I2C_A004447
314 select SYS_FSL_ERRATUM_IFC_A002769
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800315 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800316 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800317 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800318 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800319 select SYS_FSL_SEC_COMPAT_4
York Sun85ab6f02016-12-28 08:43:29 -0800320 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530321 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600322 imply CMD_EEPROM
Tom Rinic20bb732017-07-22 18:36:16 -0400323 imply CMD_MTDPARTS
Tom Rini00448d22017-07-28 21:31:42 -0400324 imply CMD_NAND
Simon Glassc88a09a2017-08-04 16:34:34 -0600325 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600326 imply CMD_REGINFO
York Suna80bdf72016-11-15 14:09:50 -0800327
York Sun4119aee2016-11-15 18:44:22 -0800328config ARCH_C29X
329 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800330 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800331 select SYS_FSL_DDR_VER_46
York Sunbe735532016-12-28 08:43:43 -0800332 select SYS_FSL_ERRATUM_A005125
York Sun097e3602016-12-28 08:43:42 -0800333 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800334 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800335 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800336 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800337 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800338 select SYS_FSL_SEC_COMPAT_6
York Sun85ab6f02016-12-28 08:43:29 -0800339 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530340 select FSL_IFC
Tom Rini00448d22017-07-28 21:31:42 -0400341 imply CMD_NAND
Simon Glassc88a09a2017-08-04 16:34:34 -0600342 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600343 imply CMD_REGINFO
York Sun4119aee2016-11-15 18:44:22 -0800344
York Sun5557d6b2016-11-16 11:06:47 -0800345config ARCH_MPC8536
346 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800347 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800348 select SYS_FSL_ERRATUM_A004508
349 select SYS_FSL_ERRATUM_A005125
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800350 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800351 select SYS_FSL_HAS_DDR2
352 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800353 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800354 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800355 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800356 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530357 select FSL_ELBC
Tom Rini00448d22017-07-28 21:31:42 -0400358 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600359 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600360 imply CMD_REGINFO
York Sun5557d6b2016-11-16 11:06:47 -0800361
York Sun5ddce892016-11-16 11:13:06 -0800362config ARCH_MPC8540
363 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800364 select FSL_LAW
York Sund297d392016-12-28 08:43:40 -0800365 select SYS_FSL_HAS_DDR1
York Sun5ddce892016-11-16 11:13:06 -0800366
York Sunbf820c02016-11-16 11:18:31 -0800367config ARCH_MPC8541
368 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800369 select FSL_LAW
York Sund297d392016-12-28 08:43:40 -0800370 select SYS_FSL_HAS_DDR1
York Sun92c36e22016-12-28 08:43:30 -0800371 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800372 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800373 select SYS_FSL_SEC_COMPAT_2
York Sunbf820c02016-11-16 11:18:31 -0800374
York Sun5ac012a2016-11-15 13:57:15 -0800375config ARCH_MPC8544
376 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800377 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800378 select SYS_FSL_ERRATUM_A005125
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800379 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800380 select SYS_FSL_HAS_DDR2
York Sun92c36e22016-12-28 08:43:30 -0800381 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800382 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800383 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800384 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530385 select FSL_ELBC
York Sun5ac012a2016-11-15 13:57:15 -0800386
York Sunefc49e02016-11-15 13:52:34 -0800387config ARCH_MPC8548
388 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800389 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800390 select SYS_FSL_ERRATUM_A005125
391 select SYS_FSL_ERRATUM_NMG_DDR120
392 select SYS_FSL_ERRATUM_NMG_LBC103
393 select SYS_FSL_ERRATUM_NMG_ETSEC129
394 select SYS_FSL_ERRATUM_I2C_A004447
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800395 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800396 select SYS_FSL_HAS_DDR2
397 select SYS_FSL_HAS_DDR1
York Sun92c36e22016-12-28 08:43:30 -0800398 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800399 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800400 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800401 select SYS_PPC_E500_USE_DEBUG_TLB
Christophe Leroye538bbc2017-08-04 16:34:40 -0600402 imply CMD_REGINFO
York Sunefc49e02016-11-15 13:52:34 -0800403
York Sun32be34d2016-11-16 11:23:23 -0800404config ARCH_MPC8555
405 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800406 select FSL_LAW
York Sund297d392016-12-28 08:43:40 -0800407 select SYS_FSL_HAS_DDR1
York Sun92c36e22016-12-28 08:43:30 -0800408 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800409 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800410 select SYS_FSL_SEC_COMPAT_2
York Sun32be34d2016-11-16 11:23:23 -0800411
York Sunb4046f42016-11-16 11:26:45 -0800412config ARCH_MPC8560
413 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800414 select FSL_LAW
York Sund297d392016-12-28 08:43:40 -0800415 select SYS_FSL_HAS_DDR1
York Sunb4046f42016-11-16 11:26:45 -0800416
York Suna0d4b582016-11-16 11:32:17 -0800417config ARCH_MPC8568
418 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800419 select FSL_LAW
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800420 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800421 select SYS_FSL_HAS_DDR2
York Sun92c36e22016-12-28 08:43:30 -0800422 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800423 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800424 select SYS_FSL_SEC_COMPAT_2
York Suna0d4b582016-11-16 11:32:17 -0800425
York Sun018874e2016-11-16 11:39:20 -0800426config ARCH_MPC8572
427 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800428 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800429 select SYS_FSL_ERRATUM_A004508
430 select SYS_FSL_ERRATUM_A005125
431 select SYS_FSL_ERRATUM_DDR_115
432 select SYS_FSL_ERRATUM_DDR111_DDR134
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800433 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800434 select SYS_FSL_HAS_DDR2
435 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800436 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800437 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800438 select SYS_FSL_SEC_COMPAT_2
York Sund297d392016-12-28 08:43:40 -0800439 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530440 select FSL_ELBC
Tom Rini00448d22017-07-28 21:31:42 -0400441 imply CMD_NAND
York Sun018874e2016-11-16 11:39:20 -0800442
York Sun24f88b32016-11-16 13:08:52 -0800443config ARCH_P1010
444 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800445 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800446 select SYS_FSL_ERRATUM_A004477
447 select SYS_FSL_ERRATUM_A004508
448 select SYS_FSL_ERRATUM_A005125
Chris Packham434f0582018-10-04 20:03:53 +1300449 select SYS_FSL_ERRATUM_A005275
York Sunbe735532016-12-28 08:43:43 -0800450 select SYS_FSL_ERRATUM_A006261
451 select SYS_FSL_ERRATUM_A007075
York Sun097e3602016-12-28 08:43:42 -0800452 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800453 select SYS_FSL_ERRATUM_I2C_A004447
454 select SYS_FSL_ERRATUM_IFC_A002769
455 select SYS_FSL_ERRATUM_P1010_A003549
456 select SYS_FSL_ERRATUM_SEC_A003571
457 select SYS_FSL_ERRATUM_IFC_A003399
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800458 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800459 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800460 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800461 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800462 select SYS_FSL_SEC_COMPAT_4
York Sun85ab6f02016-12-28 08:43:29 -0800463 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530464 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600465 imply CMD_EEPROM
Tom Rinic20bb732017-07-22 18:36:16 -0400466 imply CMD_MTDPARTS
Tom Rini00448d22017-07-28 21:31:42 -0400467 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600468 imply CMD_SATA
Simon Glassc88a09a2017-08-04 16:34:34 -0600469 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600470 imply CMD_REGINFO
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200471 imply FSL_SATA
York Sun24f88b32016-11-16 13:08:52 -0800472
York Sun3680e592016-11-16 15:54:15 -0800473config ARCH_P1011
474 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800475 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800476 select SYS_FSL_ERRATUM_A004508
477 select SYS_FSL_ERRATUM_A005125
478 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800479 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800480 select FSL_PCIE_DISABLE_ASPM
York Sund297d392016-12-28 08:43:40 -0800481 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800482 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800483 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800484 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800485 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530486 select FSL_ELBC
York Sun3680e592016-11-16 15:54:15 -0800487
York Sunaf2dc812016-11-18 10:02:14 -0800488config ARCH_P1020
489 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800490 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800491 select SYS_FSL_ERRATUM_A004508
492 select SYS_FSL_ERRATUM_A005125
493 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800494 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800495 select FSL_PCIE_DISABLE_ASPM
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800496 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800497 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800498 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800499 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800500 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800501 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530502 select FSL_ELBC
Tom Rini00448d22017-07-28 21:31:42 -0400503 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600504 imply CMD_SATA
Simon Glassc88a09a2017-08-04 16:34:34 -0600505 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600506 imply CMD_REGINFO
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +0200507 imply SATA_SIL
York Sunaf2dc812016-11-18 10:02:14 -0800508
York Sun2f924be2016-11-18 10:59:02 -0800509config ARCH_P1021
510 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800511 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800512 select SYS_FSL_ERRATUM_A004508
513 select SYS_FSL_ERRATUM_A005125
514 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800515 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800516 select FSL_PCIE_DISABLE_ASPM
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800517 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800518 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800519 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800520 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800521 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800522 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530523 select FSL_ELBC
Christophe Leroye538bbc2017-08-04 16:34:40 -0600524 imply CMD_REGINFO
Tom Rini00448d22017-07-28 21:31:42 -0400525 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600526 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600527 imply CMD_REGINFO
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +0200528 imply SATA_SIL
York Sun2f924be2016-11-18 10:59:02 -0800529
York Sunfeeaae22016-11-16 15:45:31 -0800530config ARCH_P1023
531 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800532 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800533 select SYS_FSL_ERRATUM_A004508
534 select SYS_FSL_ERRATUM_A005125
535 select SYS_FSL_ERRATUM_I2C_A004447
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800536 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800537 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800538 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800539 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800540 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530541 select FSL_ELBC
York Sunfeeaae22016-11-16 15:45:31 -0800542
York Sun76780b22016-11-18 11:00:57 -0800543config ARCH_P1024
544 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800545 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800546 select SYS_FSL_ERRATUM_A004508
547 select SYS_FSL_ERRATUM_A005125
548 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800549 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800550 select FSL_PCIE_DISABLE_ASPM
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800551 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800552 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800553 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800554 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800555 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800556 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530557 select FSL_ELBC
Simon Glass4590d4e2017-05-17 03:25:10 -0600558 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400559 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600560 imply CMD_SATA
Simon Glassc88a09a2017-08-04 16:34:34 -0600561 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600562 imply CMD_REGINFO
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +0200563 imply SATA_SIL
York Sun76780b22016-11-18 11:00:57 -0800564
York Sun0f577972016-11-18 11:05:38 -0800565config ARCH_P1025
566 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800567 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800568 select SYS_FSL_ERRATUM_A004508
569 select SYS_FSL_ERRATUM_A005125
570 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800571 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800572 select FSL_PCIE_DISABLE_ASPM
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800573 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800574 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800575 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800576 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800577 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800578 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530579 select FSL_ELBC
Simon Glass203b3ab2017-06-14 21:28:24 -0600580 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600581 imply CMD_REGINFO
York Sun0f577972016-11-18 11:05:38 -0800582
York Sun4b08dd72016-11-18 11:08:43 -0800583config ARCH_P2020
584 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800585 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800586 select SYS_FSL_ERRATUM_A004477
587 select SYS_FSL_ERRATUM_A004508
588 select SYS_FSL_ERRATUM_A005125
York Sun097e3602016-12-28 08:43:42 -0800589 select SYS_FSL_ERRATUM_ESDHC111
590 select SYS_FSL_ERRATUM_ESDHC_A001
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800591 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800592 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800593 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800594 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800595 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800596 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530597 select FSL_ELBC
Simon Glass4590d4e2017-05-17 03:25:10 -0600598 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400599 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600600 imply CMD_REGINFO
York Sun4b08dd72016-11-18 11:08:43 -0800601
York Sun5786fca2016-11-18 11:15:21 -0800602config ARCH_P2041
603 bool
York Sunaf5495a2016-12-28 08:43:27 -0800604 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800605 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800606 select SYS_FSL_ERRATUM_A004510
607 select SYS_FSL_ERRATUM_A004849
Chris Packham434f0582018-10-04 20:03:53 +1300608 select SYS_FSL_ERRATUM_A005275
York Sunbe735532016-12-28 08:43:43 -0800609 select SYS_FSL_ERRATUM_A006261
610 select SYS_FSL_ERRATUM_CPU_A003999
611 select SYS_FSL_ERRATUM_DDR_A003
612 select SYS_FSL_ERRATUM_DDR_A003474
York Sun097e3602016-12-28 08:43:42 -0800613 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800614 select SYS_FSL_ERRATUM_I2C_A004447
615 select SYS_FSL_ERRATUM_NMG_CPU_A011
616 select SYS_FSL_ERRATUM_SRIO_A004034
617 select SYS_FSL_ERRATUM_USB14
York Sund297d392016-12-28 08:43:40 -0800618 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800619 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800620 select SYS_FSL_QORIQ_CHASSIS1
York Sunfa4199422016-12-28 08:43:31 -0800621 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800622 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530623 select FSL_ELBC
Tom Rini00448d22017-07-28 21:31:42 -0400624 imply CMD_NAND
York Sun5786fca2016-11-18 11:15:21 -0800625
York Sundf70d062016-11-18 11:20:40 -0800626config ARCH_P3041
627 bool
York Sunaf5495a2016-12-28 08:43:27 -0800628 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800629 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800630 select SYS_FSL_DDR_VER_44
York Sunbe735532016-12-28 08:43:43 -0800631 select SYS_FSL_ERRATUM_A004510
632 select SYS_FSL_ERRATUM_A004849
Chris Packham434f0582018-10-04 20:03:53 +1300633 select SYS_FSL_ERRATUM_A005275
York Sunbe735532016-12-28 08:43:43 -0800634 select SYS_FSL_ERRATUM_A005812
635 select SYS_FSL_ERRATUM_A006261
636 select SYS_FSL_ERRATUM_CPU_A003999
637 select SYS_FSL_ERRATUM_DDR_A003
638 select SYS_FSL_ERRATUM_DDR_A003474
York Sun097e3602016-12-28 08:43:42 -0800639 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800640 select SYS_FSL_ERRATUM_I2C_A004447
641 select SYS_FSL_ERRATUM_NMG_CPU_A011
642 select SYS_FSL_ERRATUM_SRIO_A004034
643 select SYS_FSL_ERRATUM_USB14
York Sund297d392016-12-28 08:43:40 -0800644 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800645 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800646 select SYS_FSL_QORIQ_CHASSIS1
York Sunfa4199422016-12-28 08:43:31 -0800647 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800648 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530649 select FSL_ELBC
Tom Rini00448d22017-07-28 21:31:42 -0400650 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600651 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600652 imply CMD_REGINFO
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200653 imply FSL_SATA
York Sundf70d062016-11-18 11:20:40 -0800654
York Sun84be8a92016-11-18 11:24:40 -0800655config ARCH_P4080
656 bool
York Sunaf5495a2016-12-28 08:43:27 -0800657 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800658 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800659 select SYS_FSL_DDR_VER_44
York Sunbe735532016-12-28 08:43:43 -0800660 select SYS_FSL_ERRATUM_A004510
661 select SYS_FSL_ERRATUM_A004580
662 select SYS_FSL_ERRATUM_A004849
663 select SYS_FSL_ERRATUM_A005812
664 select SYS_FSL_ERRATUM_A007075
665 select SYS_FSL_ERRATUM_CPC_A002
666 select SYS_FSL_ERRATUM_CPC_A003
667 select SYS_FSL_ERRATUM_CPU_A003999
668 select SYS_FSL_ERRATUM_DDR_A003
669 select SYS_FSL_ERRATUM_DDR_A003474
670 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800671 select SYS_FSL_ERRATUM_ESDHC111
672 select SYS_FSL_ERRATUM_ESDHC13
673 select SYS_FSL_ERRATUM_ESDHC135
York Sunbe735532016-12-28 08:43:43 -0800674 select SYS_FSL_ERRATUM_I2C_A004447
675 select SYS_FSL_ERRATUM_NMG_CPU_A011
676 select SYS_FSL_ERRATUM_SRIO_A004034
677 select SYS_P4080_ERRATUM_CPU22
678 select SYS_P4080_ERRATUM_PCIE_A003
679 select SYS_P4080_ERRATUM_SERDES8
680 select SYS_P4080_ERRATUM_SERDES9
681 select SYS_P4080_ERRATUM_SERDES_A001
682 select SYS_P4080_ERRATUM_SERDES_A005
York Sund297d392016-12-28 08:43:40 -0800683 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800684 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800685 select SYS_FSL_QORIQ_CHASSIS1
York Sunfa4199422016-12-28 08:43:31 -0800686 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800687 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530688 select FSL_ELBC
Simon Glass203b3ab2017-06-14 21:28:24 -0600689 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600690 imply CMD_REGINFO
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +0200691 imply SATA_SIL
York Sun84be8a92016-11-18 11:24:40 -0800692
York Suna3c5b662016-11-18 11:39:36 -0800693config ARCH_P5040
694 bool
York Sunaf5495a2016-12-28 08:43:27 -0800695 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800696 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800697 select SYS_FSL_DDR_VER_44
York Sunbe735532016-12-28 08:43:43 -0800698 select SYS_FSL_ERRATUM_A004510
699 select SYS_FSL_ERRATUM_A004699
Chris Packham434f0582018-10-04 20:03:53 +1300700 select SYS_FSL_ERRATUM_A005275
York Sunbe735532016-12-28 08:43:43 -0800701 select SYS_FSL_ERRATUM_A005812
702 select SYS_FSL_ERRATUM_A006261
703 select SYS_FSL_ERRATUM_DDR_A003
704 select SYS_FSL_ERRATUM_DDR_A003474
York Sun097e3602016-12-28 08:43:42 -0800705 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800706 select SYS_FSL_ERRATUM_USB14
York Sund297d392016-12-28 08:43:40 -0800707 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800708 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800709 select SYS_FSL_QORIQ_CHASSIS1
York Sunfa4199422016-12-28 08:43:31 -0800710 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800711 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800712 select SYS_PPC64
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530713 select FSL_ELBC
Simon Glass203b3ab2017-06-14 21:28:24 -0600714 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600715 imply CMD_REGINFO
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200716 imply FSL_SATA
York Suna3c5b662016-11-18 11:39:36 -0800717
York Sun51e91e82016-11-18 12:29:51 -0800718config ARCH_QEMU_E500
719 bool
720
York Sunbcee92e2016-11-18 12:35:47 -0800721config ARCH_T1023
722 bool
York Sunaf5495a2016-12-28 08:43:27 -0800723 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800724 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800725 select SYS_FSL_DDR_VER_50
York Sunbe735532016-12-28 08:43:43 -0800726 select SYS_FSL_ERRATUM_A008378
Jaiprakash Singhe230a922020-06-02 12:44:02 +0530727 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800728 select SYS_FSL_ERRATUM_A009663
729 select SYS_FSL_ERRATUM_A009942
York Sun097e3602016-12-28 08:43:42 -0800730 select SYS_FSL_ERRATUM_ESDHC111
York Sund297d392016-12-28 08:43:40 -0800731 select SYS_FSL_HAS_DDR3
732 select SYS_FSL_HAS_DDR4
York Sun92c36e22016-12-28 08:43:30 -0800733 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800734 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800735 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800736 select SYS_FSL_SEC_COMPAT_5
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530737 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600738 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400739 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600740 imply CMD_REGINFO
York Sunbcee92e2016-11-18 12:35:47 -0800741
York Sun7d29dd62016-11-18 13:01:34 -0800742config ARCH_T1024
743 bool
York Sunaf5495a2016-12-28 08:43:27 -0800744 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800745 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800746 select SYS_FSL_DDR_VER_50
York Sunbe735532016-12-28 08:43:43 -0800747 select SYS_FSL_ERRATUM_A008378
Jaiprakash Singhe230a922020-06-02 12:44:02 +0530748 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800749 select SYS_FSL_ERRATUM_A009663
750 select SYS_FSL_ERRATUM_A009942
York Sun097e3602016-12-28 08:43:42 -0800751 select SYS_FSL_ERRATUM_ESDHC111
York Sund297d392016-12-28 08:43:40 -0800752 select SYS_FSL_HAS_DDR3
753 select SYS_FSL_HAS_DDR4
York Sun92c36e22016-12-28 08:43:30 -0800754 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800755 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800756 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800757 select SYS_FSL_SEC_COMPAT_5
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530758 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600759 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400760 imply CMD_NAND
Tom Rinic20bb732017-07-22 18:36:16 -0400761 imply CMD_MTDPARTS
Christophe Leroye538bbc2017-08-04 16:34:40 -0600762 imply CMD_REGINFO
York Sun7d29dd62016-11-18 13:01:34 -0800763
York Suna5b5d882016-11-18 13:11:12 -0800764config ARCH_T1040
765 bool
York Sunaf5495a2016-12-28 08:43:27 -0800766 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800767 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800768 select SYS_FSL_DDR_VER_50
York Sunbe735532016-12-28 08:43:43 -0800769 select SYS_FSL_ERRATUM_A008044
770 select SYS_FSL_ERRATUM_A008378
Joakim Tjernlund477602c2019-11-20 17:07:34 +0100771 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800772 select SYS_FSL_ERRATUM_A009663
773 select SYS_FSL_ERRATUM_A009942
York Sun097e3602016-12-28 08:43:42 -0800774 select SYS_FSL_ERRATUM_ESDHC111
York Sund297d392016-12-28 08:43:40 -0800775 select SYS_FSL_HAS_DDR3
776 select SYS_FSL_HAS_DDR4
York Sun92c36e22016-12-28 08:43:30 -0800777 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800778 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800779 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800780 select SYS_FSL_SEC_COMPAT_5
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530781 select FSL_IFC
Tom Rinic20bb732017-07-22 18:36:16 -0400782 imply CMD_MTDPARTS
Tom Rini00448d22017-07-28 21:31:42 -0400783 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600784 imply CMD_REGINFO
York Suna5b5d882016-11-18 13:11:12 -0800785
York Sun2d7b2d42016-11-18 13:36:39 -0800786config ARCH_T1042
787 bool
York Sunaf5495a2016-12-28 08:43:27 -0800788 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800789 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800790 select SYS_FSL_DDR_VER_50
York Sunbe735532016-12-28 08:43:43 -0800791 select SYS_FSL_ERRATUM_A008044
792 select SYS_FSL_ERRATUM_A008378
Joakim Tjernlund477602c2019-11-20 17:07:34 +0100793 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800794 select SYS_FSL_ERRATUM_A009663
795 select SYS_FSL_ERRATUM_A009942
York Sun097e3602016-12-28 08:43:42 -0800796 select SYS_FSL_ERRATUM_ESDHC111
York Sund297d392016-12-28 08:43:40 -0800797 select SYS_FSL_HAS_DDR3
798 select SYS_FSL_HAS_DDR4
York Sun92c36e22016-12-28 08:43:30 -0800799 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800800 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800801 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800802 select SYS_FSL_SEC_COMPAT_5
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530803 select FSL_IFC
Tom Rinic20bb732017-07-22 18:36:16 -0400804 imply CMD_MTDPARTS
Tom Rini00448d22017-07-28 21:31:42 -0400805 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600806 imply CMD_REGINFO
York Sun2d7b2d42016-11-18 13:36:39 -0800807
York Sune20c6852016-11-21 12:54:19 -0800808config ARCH_T2080
809 bool
York Sunaf5495a2016-12-28 08:43:27 -0800810 select E500MC
York Sunf4e8a752016-12-28 08:43:48 -0800811 select E6500
York Sune7a6eaf2016-12-02 10:44:34 -0800812 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800813 select SYS_FSL_DDR_VER_47
York Sunbe735532016-12-28 08:43:43 -0800814 select SYS_FSL_ERRATUM_A006379
815 select SYS_FSL_ERRATUM_A006593
816 select SYS_FSL_ERRATUM_A007186
817 select SYS_FSL_ERRATUM_A007212
Tony O'Brien8acb1272016-12-02 09:22:34 +1300818 select SYS_FSL_ERRATUM_A007815
Darwin Dingela56d6c02016-10-25 09:48:01 +1300819 select SYS_FSL_ERRATUM_A007907
Jaiprakash Singhe230a922020-06-02 12:44:02 +0530820 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800821 select SYS_FSL_ERRATUM_A009942
York Sun097e3602016-12-28 08:43:42 -0800822 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800823 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800824 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800825 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800826 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800827 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800828 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800829 select SYS_PPC64
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530830 select FSL_IFC
Peng Ma34bed5d2019-12-23 09:28:12 +0000831 imply CMD_SATA
Tom Rini00448d22017-07-28 21:31:42 -0400832 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600833 imply CMD_REGINFO
Peng Ma34bed5d2019-12-23 09:28:12 +0000834 imply FSL_SATA
York Sune20c6852016-11-21 12:54:19 -0800835
York Sunc7ea9242016-11-21 13:31:34 -0800836config ARCH_T4160
837 bool
York Sunaf5495a2016-12-28 08:43:27 -0800838 select E500MC
York Sunf4e8a752016-12-28 08:43:48 -0800839 select E6500
York Sune7a6eaf2016-12-02 10:44:34 -0800840 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800841 select SYS_FSL_DDR_VER_47
York Sunbe735532016-12-28 08:43:43 -0800842 select SYS_FSL_ERRATUM_A004468
843 select SYS_FSL_ERRATUM_A005871
844 select SYS_FSL_ERRATUM_A006379
845 select SYS_FSL_ERRATUM_A006593
846 select SYS_FSL_ERRATUM_A007186
847 select SYS_FSL_ERRATUM_A007798
848 select SYS_FSL_ERRATUM_A009942
York Sund297d392016-12-28 08:43:40 -0800849 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800850 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800851 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800852 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800853 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800854 select SYS_PPC64
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530855 select FSL_IFC
Tom Rini00448d22017-07-28 21:31:42 -0400856 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600857 imply CMD_REGINFO
York Sunc7ea9242016-11-21 13:31:34 -0800858
York Sun0fad3262016-11-21 13:35:41 -0800859config ARCH_T4240
860 bool
York Sunaf5495a2016-12-28 08:43:27 -0800861 select E500MC
York Sunf4e8a752016-12-28 08:43:48 -0800862 select E6500
York Sune7a6eaf2016-12-02 10:44:34 -0800863 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800864 select SYS_FSL_DDR_VER_47
York Sunbe735532016-12-28 08:43:43 -0800865 select SYS_FSL_ERRATUM_A004468
866 select SYS_FSL_ERRATUM_A005871
867 select SYS_FSL_ERRATUM_A006261
868 select SYS_FSL_ERRATUM_A006379
869 select SYS_FSL_ERRATUM_A006593
870 select SYS_FSL_ERRATUM_A007186
871 select SYS_FSL_ERRATUM_A007798
Tony O'Brien8acb1272016-12-02 09:22:34 +1300872 select SYS_FSL_ERRATUM_A007815
Darwin Dingela56d6c02016-10-25 09:48:01 +1300873 select SYS_FSL_ERRATUM_A007907
Jaiprakash Singhe230a922020-06-02 12:44:02 +0530874 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800875 select SYS_FSL_ERRATUM_A009942
York Sund297d392016-12-28 08:43:40 -0800876 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800877 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800878 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800879 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800880 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800881 select SYS_PPC64
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530882 select FSL_IFC
Simon Glass203b3ab2017-06-14 21:28:24 -0600883 imply CMD_SATA
Tom Rini00448d22017-07-28 21:31:42 -0400884 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600885 imply CMD_REGINFO
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200886 imply FSL_SATA
York Sune7a6eaf2016-12-02 10:44:34 -0800887
Jagdish Gediya7f2ad252018-09-03 21:35:10 +0530888config MPC85XX_HAVE_RESET_VECTOR
889 bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc"
890 depends on MPC85xx
891
York Sunaf5495a2016-12-28 08:43:27 -0800892config BOOKE
893 bool
894 default y
895
896config E500
897 bool
898 default y
899 help
900 Enable PowerPC E500 cores, including e500v1, e500v2, e500mc
901
902config E500MC
903 bool
Simon Glassc88a09a2017-08-04 16:34:34 -0600904 imply CMD_PCI
York Sunaf5495a2016-12-28 08:43:27 -0800905 help
906 Enble PowerPC E500MC core
907
York Sunf4e8a752016-12-28 08:43:48 -0800908config E6500
909 bool
910 help
911 Enable PowerPC E6500 core
912
York Sune7a6eaf2016-12-02 10:44:34 -0800913config FSL_LAW
914 bool
915 help
916 Use Freescale common code for Local Access Window
York Sun0fad3262016-11-21 13:35:41 -0800917
Udit Agarwald2dd2f72019-11-07 16:11:39 +0000918config NXP_ESBC
919 bool "NXP_ESBC"
York Sunafa0fd32016-12-02 09:33:14 -0800920 help
921 Enable Freescale Secure Boot feature. Normally selected
922 by defconfig. If unsure, do not change.
923
York Suncbf7bf32016-11-23 12:30:40 -0800924config MAX_CPUS
925 int "Maximum number of CPUs permitted for MPC85xx"
926 default 12 if ARCH_T4240
927 default 8 if ARCH_P4080 || \
928 ARCH_T4160
929 default 4 if ARCH_B4860 || \
930 ARCH_P2041 || \
931 ARCH_P3041 || \
932 ARCH_P5040 || \
933 ARCH_T1040 || \
934 ARCH_T1042 || \
Tom Rini3ec582b2021-02-20 20:06:21 -0500935 ARCH_T2080
York Suncbf7bf32016-11-23 12:30:40 -0800936 default 2 if ARCH_B4420 || \
937 ARCH_BSC9132 || \
938 ARCH_MPC8572 || \
939 ARCH_P1020 || \
940 ARCH_P1021 || \
York Suncbf7bf32016-11-23 12:30:40 -0800941 ARCH_P1023 || \
942 ARCH_P1024 || \
943 ARCH_P1025 || \
944 ARCH_P2020 || \
York Suncbf7bf32016-11-23 12:30:40 -0800945 ARCH_T1023 || \
946 ARCH_T1024
947 default 1
948 help
949 Set this number to the maximum number of possible CPUs in the SoC.
950 SoCs may have multiple clusters with each cluster may have multiple
951 ports. If some ports are reserved but higher ports are used for
952 cores, count the reserved ports. This will allocate enough memory
953 in spin table to properly handle all cores.
954
York Sun7ea6f352016-12-01 13:26:06 -0800955config SYS_CCSRBAR_DEFAULT
956 hex "Default CCSRBAR address"
957 default 0xff700000 if ARCH_BSC9131 || \
958 ARCH_BSC9132 || \
959 ARCH_C29X || \
960 ARCH_MPC8536 || \
961 ARCH_MPC8540 || \
962 ARCH_MPC8541 || \
963 ARCH_MPC8544 || \
964 ARCH_MPC8548 || \
965 ARCH_MPC8555 || \
966 ARCH_MPC8560 || \
967 ARCH_MPC8568 || \
York Sun7ea6f352016-12-01 13:26:06 -0800968 ARCH_MPC8572 || \
969 ARCH_P1010 || \
970 ARCH_P1011 || \
971 ARCH_P1020 || \
972 ARCH_P1021 || \
York Sun7ea6f352016-12-01 13:26:06 -0800973 ARCH_P1024 || \
974 ARCH_P1025 || \
975 ARCH_P2020
976 default 0xff600000 if ARCH_P1023
977 default 0xfe000000 if ARCH_B4420 || \
978 ARCH_B4860 || \
979 ARCH_P2041 || \
980 ARCH_P3041 || \
981 ARCH_P4080 || \
York Sun7ea6f352016-12-01 13:26:06 -0800982 ARCH_P5040 || \
York Sun7ea6f352016-12-01 13:26:06 -0800983 ARCH_T1023 || \
984 ARCH_T1024 || \
985 ARCH_T1040 || \
986 ARCH_T1042 || \
987 ARCH_T2080 || \
York Sun7ea6f352016-12-01 13:26:06 -0800988 ARCH_T4160 || \
989 ARCH_T4240
990 default 0xe0000000 if ARCH_QEMU_E500
991 help
992 Default value of CCSRBAR comes from power-on-reset. It
993 is fixed on each SoC. Some SoCs can have different value
994 if changed by pre-boot regime. The value here must match
995 the current value in SoC. If not sure, do not change.
996
York Sunbe735532016-12-28 08:43:43 -0800997config SYS_FSL_ERRATUM_A004468
998 bool
999
1000config SYS_FSL_ERRATUM_A004477
1001 bool
1002
1003config SYS_FSL_ERRATUM_A004508
1004 bool
1005
1006config SYS_FSL_ERRATUM_A004580
1007 bool
1008
1009config SYS_FSL_ERRATUM_A004699
1010 bool
1011
1012config SYS_FSL_ERRATUM_A004849
1013 bool
1014
1015config SYS_FSL_ERRATUM_A004510
1016 bool
1017
1018config SYS_FSL_ERRATUM_A004510_SVR_REV
1019 hex
1020 depends on SYS_FSL_ERRATUM_A004510
1021 default 0x20 if ARCH_P4080
1022 default 0x10
1023
1024config SYS_FSL_ERRATUM_A004510_SVR_REV2
1025 hex
1026 depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041))
1027 default 0x11
1028
1029config SYS_FSL_ERRATUM_A005125
1030 bool
1031
1032config SYS_FSL_ERRATUM_A005434
1033 bool
1034
1035config SYS_FSL_ERRATUM_A005812
1036 bool
1037
1038config SYS_FSL_ERRATUM_A005871
1039 bool
1040
Chris Packham434f0582018-10-04 20:03:53 +13001041config SYS_FSL_ERRATUM_A005275
1042 bool
1043
York Sunbe735532016-12-28 08:43:43 -08001044config SYS_FSL_ERRATUM_A006261
1045 bool
1046
1047config SYS_FSL_ERRATUM_A006379
1048 bool
1049
1050config SYS_FSL_ERRATUM_A006384
1051 bool
1052
1053config SYS_FSL_ERRATUM_A006475
1054 bool
1055
1056config SYS_FSL_ERRATUM_A006593
1057 bool
1058
1059config SYS_FSL_ERRATUM_A007075
1060 bool
1061
1062config SYS_FSL_ERRATUM_A007186
1063 bool
1064
1065config SYS_FSL_ERRATUM_A007212
1066 bool
1067
Tony O'Brien8acb1272016-12-02 09:22:34 +13001068config SYS_FSL_ERRATUM_A007815
1069 bool
1070
York Sunbe735532016-12-28 08:43:43 -08001071config SYS_FSL_ERRATUM_A007798
1072 bool
1073
Darwin Dingela56d6c02016-10-25 09:48:01 +13001074config SYS_FSL_ERRATUM_A007907
1075 bool
1076
York Sunbe735532016-12-28 08:43:43 -08001077config SYS_FSL_ERRATUM_A008044
1078 bool
1079
1080config SYS_FSL_ERRATUM_CPC_A002
1081 bool
1082
1083config SYS_FSL_ERRATUM_CPC_A003
1084 bool
1085
1086config SYS_FSL_ERRATUM_CPU_A003999
1087 bool
1088
1089config SYS_FSL_ERRATUM_ELBC_A001
1090 bool
1091
1092config SYS_FSL_ERRATUM_I2C_A004447
1093 bool
1094
1095config SYS_FSL_A004447_SVR_REV
1096 hex
1097 depends on SYS_FSL_ERRATUM_I2C_A004447
1098 default 0x00 if ARCH_MPC8548
1099 default 0x10 if ARCH_P1010
1100 default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132
Tom Rini30900822021-02-20 20:06:30 -05001101 default 0x20 if ARCH_P3041 || ARCH_P4080
York Sunbe735532016-12-28 08:43:43 -08001102
1103config SYS_FSL_ERRATUM_IFC_A002769
1104 bool
1105
1106config SYS_FSL_ERRATUM_IFC_A003399
1107 bool
1108
1109config SYS_FSL_ERRATUM_NMG_CPU_A011
1110 bool
1111
1112config SYS_FSL_ERRATUM_NMG_ETSEC129
1113 bool
1114
1115config SYS_FSL_ERRATUM_NMG_LBC103
1116 bool
1117
1118config SYS_FSL_ERRATUM_P1010_A003549
1119 bool
1120
1121config SYS_FSL_ERRATUM_SATA_A001
1122 bool
1123
1124config SYS_FSL_ERRATUM_SEC_A003571
1125 bool
1126
1127config SYS_FSL_ERRATUM_SRIO_A004034
1128 bool
1129
1130config SYS_FSL_ERRATUM_USB14
1131 bool
1132
1133config SYS_P4080_ERRATUM_CPU22
1134 bool
1135
1136config SYS_P4080_ERRATUM_PCIE_A003
1137 bool
1138
1139config SYS_P4080_ERRATUM_SERDES8
1140 bool
1141
1142config SYS_P4080_ERRATUM_SERDES9
1143 bool
1144
1145config SYS_P4080_ERRATUM_SERDES_A001
1146 bool
1147
1148config SYS_P4080_ERRATUM_SERDES_A005
1149 bool
1150
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +08001151config FSL_PCIE_DISABLE_ASPM
1152 bool
1153
Hou Zhiqiang01500f52019-05-23 11:52:44 +08001154config FSL_PCIE_RESET
1155 bool
1156
York Sun0d3b8592016-12-28 08:43:49 -08001157config SYS_FSL_QORIQ_CHASSIS1
1158 bool
1159
1160config SYS_FSL_QORIQ_CHASSIS2
1161 bool
1162
York Sun091e5e52016-12-01 14:05:02 -08001163config SYS_FSL_NUM_LAWS
1164 int "Number of local access windows"
1165 depends on FSL_LAW
1166 default 32 if ARCH_B4420 || \
1167 ARCH_B4860 || \
1168 ARCH_P2041 || \
1169 ARCH_P3041 || \
1170 ARCH_P4080 || \
York Sun091e5e52016-12-01 14:05:02 -08001171 ARCH_P5040 || \
1172 ARCH_T2080 || \
York Sun091e5e52016-12-01 14:05:02 -08001173 ARCH_T4160 || \
1174 ARCH_T4240
York Sund7dd06c2016-12-28 08:43:32 -08001175 default 16 if ARCH_T1023 || \
York Sun091e5e52016-12-01 14:05:02 -08001176 ARCH_T1024 || \
1177 ARCH_T1040 || \
1178 ARCH_T1042
1179 default 12 if ARCH_BSC9131 || \
1180 ARCH_BSC9132 || \
1181 ARCH_C29X || \
1182 ARCH_MPC8536 || \
1183 ARCH_MPC8572 || \
1184 ARCH_P1010 || \
1185 ARCH_P1011 || \
1186 ARCH_P1020 || \
1187 ARCH_P1021 || \
York Sun091e5e52016-12-01 14:05:02 -08001188 ARCH_P1023 || \
1189 ARCH_P1024 || \
1190 ARCH_P1025 || \
1191 ARCH_P2020
1192 default 10 if ARCH_MPC8544 || \
1193 ARCH_MPC8548 || \
Tom Rini12084d22021-02-20 20:06:29 -05001194 ARCH_MPC8568
York Sun091e5e52016-12-01 14:05:02 -08001195 default 8 if ARCH_MPC8540 || \
1196 ARCH_MPC8541 || \
1197 ARCH_MPC8555 || \
1198 ARCH_MPC8560
1199 help
1200 Number of local access windows. This is fixed per SoC.
1201 If not sure, do not change.
1202
York Sunf4e8a752016-12-28 08:43:48 -08001203config SYS_FSL_THREADS_PER_CORE
1204 int
1205 default 2 if E6500
1206 default 1
1207
York Sun14e098d2016-12-28 08:43:28 -08001208config SYS_NUM_TLBCAMS
1209 int "Number of TLB CAM entries"
1210 default 64 if E500MC
1211 default 16
1212 help
1213 Number of TLB CAM entries for Book-E chips. 64 for E500MC,
1214 16 for other E500 SoCs.
1215
York Sun7eafac12016-12-28 08:43:50 -08001216config SYS_PPC64
1217 bool
1218
York Sun85ab6f02016-12-28 08:43:29 -08001219config SYS_PPC_E500_USE_DEBUG_TLB
1220 bool
1221
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +05301222config FSL_IFC
1223 bool
1224
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +05301225config FSL_ELBC
1226 bool
1227
York Sun85ab6f02016-12-28 08:43:29 -08001228config SYS_PPC_E500_DEBUG_TLB
1229 int "Temporary TLB entry for external debugger"
1230 depends on SYS_PPC_E500_USE_DEBUG_TLB
1231 default 0 if ARCH_MPC8544 || ARCH_MPC8548
1232 default 1 if ARCH_MPC8536
1233 default 2 if ARCH_MPC8572 || \
1234 ARCH_P1011 || \
1235 ARCH_P1020 || \
1236 ARCH_P1021 || \
York Sun85ab6f02016-12-28 08:43:29 -08001237 ARCH_P1024 || \
1238 ARCH_P1025 || \
1239 ARCH_P2020
1240 default 3 if ARCH_P1010 || \
1241 ARCH_BSC9132 || \
1242 ARCH_C29X
1243 help
1244 Select a temporary TLB entry to be used during boot to work
1245 around limitations in e500v1 and e500v2 external debugger
1246 support. This reduces the portions of the boot code where
1247 breakpoints and single stepping do not work. The value of this
1248 symbol should be set to the TLB1 entry to be used for this
1249 purpose. If unsure, do not change.
1250
Prabhakar Kushwaha3c48f582017-02-02 15:01:26 +05301251config SYS_FSL_IFC_CLK_DIV
1252 int "Divider of platform clock"
1253 depends on FSL_IFC
1254 default 2 if ARCH_B4420 || \
1255 ARCH_B4860 || \
1256 ARCH_T1024 || \
1257 ARCH_T1023 || \
1258 ARCH_T1040 || \
1259 ARCH_T1042 || \
1260 ARCH_T4160 || \
1261 ARCH_T4240
1262 default 1
1263 help
1264 Defines divider of platform clock(clock input to
1265 IFC controller).
1266
Prabhakar Kushwahabedc5622017-02-02 15:02:00 +05301267config SYS_FSL_LBC_CLK_DIV
1268 int "Divider of platform clock"
1269 depends on FSL_ELBC || ARCH_MPC8540 || \
1270 ARCH_MPC8548 || ARCH_MPC8541 || \
1271 ARCH_MPC8555 || ARCH_MPC8560 || \
1272 ARCH_MPC8568
1273
1274 default 2 if ARCH_P2041 || \
1275 ARCH_P3041 || \
1276 ARCH_P4080 || \
Prabhakar Kushwahabedc5622017-02-02 15:02:00 +05301277 ARCH_P5040
1278 default 1
1279
1280 help
1281 Defines divider of platform clock(clock input to
1282 eLBC controller).
1283
Rajesh Bhagat6d072982021-02-15 09:46:14 +01001284config FSL_VIA
1285 bool
1286
Bin Meng2076d992021-02-25 17:22:58 +08001287source "board/emulation/qemu-ppce500/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001288source "board/freescale/corenet_ds/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001289source "board/freescale/mpc8541cds/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001290source "board/freescale/mpc8548cds/Kconfig"
1291source "board/freescale/mpc8555cds/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001292source "board/freescale/mpc8568mds/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001293source "board/freescale/p1010rdb/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001294source "board/freescale/p1_p2_rdb_pc/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001295source "board/freescale/p2041rdb/Kconfig"
Shengzhou Liu49912402014-11-24 17:11:56 +08001296source "board/freescale/t102xrdb/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001297source "board/freescale/t104xrdb/Kconfig"
1298source "board/freescale/t208xqds/Kconfig"
1299source "board/freescale/t208xrdb/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001300source "board/freescale/t4rdb/Kconfig"
Pascal Linder305329f2019-06-18 13:27:47 +02001301source "board/keymile/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001302source "board/socrates/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001303source "board/xes/xpedite520x/Kconfig"
1304source "board/xes/xpedite537x/Kconfig"
1305source "board/xes/xpedite550x/Kconfig"
Oleksandr G Zhadan19ac6882015-04-29 16:57:39 -04001306source "board/Arcturus/ucp1020/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001307
1308endmenu