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wdenkf1d0ff42005-04-13 23:15:10 +00001/*
2 * (C) Copyright 2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkf1d0ff42005-04-13 23:15:10 +00006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
Masahiro Yamada608ed2c2014-01-16 11:03:07 +090016#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
Wolfgang Denka1be4762008-05-20 16:00:29 +020017#define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
wdenkf1d0ff42005-04-13 23:15:10 +000018
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020019/*
20 * allowed and functional CONFIG_SYS_TEXT_BASE values:
21 * 0xfe000000 low boot at 0x00000100 (default board setting)
22 * 0x00100000 RAM load and test
23 */
24#define CONFIG_SYS_TEXT_BASE 0xFE000000
25
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020026#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenkf1d0ff42005-04-13 23:15:10 +000027
wdenkf1d0ff42005-04-13 23:15:10 +000028#define CONFIG_BOARD_EARLY_INIT_R
29
Becky Bruce03ea1be2008-05-08 19:02:12 -050030#define CONFIG_HIGH_BATS 1 /* High BATs supported */
31
wdenkf1d0ff42005-04-13 23:15:10 +000032/*
33 * Serial console configuration
34 */
35#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
36#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020037#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
wdenkf1d0ff42005-04-13 23:15:10 +000038
Jon Loeliger37ec35e2007-07-04 22:31:56 -050039
wdenkf1d0ff42005-04-13 23:15:10 +000040/*
Jon Loeligere54e77a2007-07-10 09:29:01 -050041 * BOOTP options
42 */
43#define CONFIG_BOOTP_BOOTFILESIZE
44#define CONFIG_BOOTP_BOOTPATH
45#define CONFIG_BOOTP_GATEWAY
46#define CONFIG_BOOTP_HOSTNAME
47
48
49/*
Jon Loeliger37ec35e2007-07-04 22:31:56 -050050 * Command line configuration.
wdenkf1d0ff42005-04-13 23:15:10 +000051 */
Jon Loeliger37ec35e2007-07-04 22:31:56 -050052#define CONFIG_CMD_ASKENV
53#define CONFIG_CMD_DATE
54#define CONFIG_CMD_DHCP
55#define CONFIG_CMD_IMMAP
56#define CONFIG_CMD_MII
Jon Loeliger37ec35e2007-07-04 22:31:56 -050057#define CONFIG_CMD_REGINFO
58#define CONFIG_CMD_SNTP
59
wdenkf1d0ff42005-04-13 23:15:10 +000060
61/*
62 * MUST be low boot - HIGHBOOT is not supported anymore
63 */
Wolfgang Denk0708bc62010-10-07 21:51:12 +020064#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065# define CONFIG_SYS_LOWBOOT 1
66# define CONFIG_SYS_LOWBOOT16 1
wdenkf1d0ff42005-04-13 23:15:10 +000067#else
Wolfgang Denk0708bc62010-10-07 21:51:12 +020068# error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
wdenkf1d0ff42005-04-13 23:15:10 +000069#endif
70
71/*
72 * Autobooting
73 */
74#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
75
76#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk1baed662008-03-03 12:16:44 +010077 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenkf1d0ff42005-04-13 23:15:10 +000078 "echo"
79
80#undef CONFIG_BOOTARGS
81
82#define CONFIG_EXTRA_ENV_SETTINGS \
83 "netdev=eth0\0" \
84 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010085 "nfsroot=${serverip}:${rootpath}\0" \
wdenkf1d0ff42005-04-13 23:15:10 +000086 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010087 "addip=setenv bootargs ${bootargs} " \
88 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
89 ":${hostname}:${netdev}:off panic=1\0" \
wdenkf1d0ff42005-04-13 23:15:10 +000090 "flash_nfs=run nfsargs addip;" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010091 "bootm ${kernel_addr}\0" \
wdenkf1d0ff42005-04-13 23:15:10 +000092 "flash_self=run ramargs addip;" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010093 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
94 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
wdenkf1d0ff42005-04-13 23:15:10 +000095 "rootpath=/opt/eldk/ppc_6xx\0" \
96 "bootfile=/tftpboot/canmb/uImage\0" \
97 ""
98
99#define CONFIG_BOOTCOMMAND "run flash_self"
100
101/*
102 * IPB Bus clocking configuration.
103 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200104#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
wdenkf1d0ff42005-04-13 23:15:10 +0000105
106/*
107 * Flash configuration, expect one 16 Megabyte Bank at most
108 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200109#define CONFIG_SYS_FLASH_BASE 0xFE000000
110#define CONFIG_SYS_FLASH_SIZE 0x02000000
111#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
112#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
wdenkf1d0ff42005-04-13 23:15:10 +0000113
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200114#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
115#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
wdenkf1d0ff42005-04-13 23:15:10 +0000116
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200117#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200118#define CONFIG_SYS_FLASH_CFI
119#define CONFIG_SYS_FLASH_EMPTY_INFO
wdenkf1d0ff42005-04-13 23:15:10 +0000120
121/*
wdenkf1d0ff42005-04-13 23:15:10 +0000122 * Environment settings
123 */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200124#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200125#define CONFIG_ENV_OFFSET (2*128*1024)
126#define CONFIG_ENV_SIZE 0x2000
127#define CONFIG_ENV_SECT_SIZE (128*1024)
wdenkf1d0ff42005-04-13 23:15:10 +0000128
129/*
130 * Memory map
131 *
132 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
133 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200134#define CONFIG_SYS_MBAR 0xf0000000 /* DO NOT CHANGE this */
135#define CONFIG_SYS_SDRAM_BASE 0x00000000
136#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
wdenkf1d0ff42005-04-13 23:15:10 +0000137
138/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200139#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200140#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
wdenkf1d0ff42005-04-13 23:15:10 +0000141
142
Wolfgang Denk0191e472010-10-26 14:34:52 +0200143#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200144#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkf1d0ff42005-04-13 23:15:10 +0000145
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200146#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200147#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
148# define CONFIG_SYS_RAMBOOT 1
wdenkf1d0ff42005-04-13 23:15:10 +0000149#endif
150
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200151#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
152#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
153#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkf1d0ff42005-04-13 23:15:10 +0000154
155/*
156 * Ethernet configuration
157 */
158#define CONFIG_MPC5xxx_FEC 1
Ben Warrenbc1b9172009-02-05 23:58:25 -0800159#define CONFIG_MPC5xxx_FEC_MII100
wdenkfaaa6022005-04-21 21:10:22 +0000160#define CONFIG_PHY_ADDR 0x0
wdenkf1d0ff42005-04-13 23:15:10 +0000161/*
162 * GPIO configuration:
163 * PSC1,2,3 predefined as UART
164 * PCI disabled
165 * Ethernet 100 with MD
166 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200167#define CONFIG_SYS_GPS_PORT_CONFIG 0x00058444
wdenkf1d0ff42005-04-13 23:15:10 +0000168
169/*
170 * Miscellaneous configurable options
171 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200172#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500173#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200174# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkf1d0ff42005-04-13 23:15:10 +0000175#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200176# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenkf1d0ff42005-04-13 23:15:10 +0000177#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200178#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
179#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
180#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkf1d0ff42005-04-13 23:15:10 +0000181
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200182#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
183#define CONFIG_SYS_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */
wdenkf1d0ff42005-04-13 23:15:10 +0000184
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200185#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
wdenkf1d0ff42005-04-13 23:15:10 +0000186
wdenkf1d0ff42005-04-13 23:15:10 +0000187#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
188
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200189#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500190#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200191# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500192#endif
193
wdenkf1d0ff42005-04-13 23:15:10 +0000194/*
195 * Various low-level settings
196 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200197#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
198#define CONFIG_SYS_HID0_FINAL HID0_ICE
wdenkf1d0ff42005-04-13 23:15:10 +0000199
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200200#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
201#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
202#define CONFIG_SYS_BOOTCS_CFG 0x00047D01
203#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
204#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
wdenkf1d0ff42005-04-13 23:15:10 +0000205
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200206#define CONFIG_SYS_CS_BURST 0x00000000
207#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
wdenkf1d0ff42005-04-13 23:15:10 +0000208
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209#define CONFIG_SYS_RESET_ADDRESS 0x7f000000
wdenkf1d0ff42005-04-13 23:15:10 +0000210
211#endif /* __CONFIG_H */