Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 76afe2ff2fdbe0762af6c9fb8ec5af677c61f262 / . / configs / tuge1_defconfig
blob: 3577745d0b2f773044f4d1a2ddc42028136d03b1 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]2CONFIG_TEXT_BASE=0xF0000000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]3CONFIG_ENV_SIZE=0x4000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SECT_SIZE=0x20000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]5CONFIG_DEFAULT_DEVICE_TREE="kmtuge1"
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]6CONFIG_BOOTCOUNT_BOOTLIMIT=3
Mario Sixd10f3182019-01-21 09:17:53 +0100[diff] [blame]7CONFIG_SYS_CLK_FREQ=66000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]8CONFIG_SYS_LOAD_ADDR=0x100000
9CONFIG_ENV_ADDR=0xF00C0000
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]10CONFIG_MPC83xx=y
Mario Six4a50e562019-01-21 09:17:56 +0100[diff] [blame]11CONFIG_HIGH_BATS=y
Mario Six190ab402019-01-21 09:17:33 +0100[diff] [blame]12CONFIG_TARGET_TUGE1=y
Mario Six94867102019-01-21 09:17:54 +0100[diff] [blame]13CONFIG_CORE_PLL_RATIO_25_1=y
14CONFIG_QUICC_MULT_FACTOR_3=y
15CONFIG_BOOT_MEMORY_SPACE_LOW=y
16CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
Mario Sixa861ea62019-01-21 09:17:57 +0100[diff] [blame]17CONFIG_BAT0=y
18CONFIG_BAT0_NAME="SDRAM"
19CONFIG_BAT0_BASE=0x00000000
20CONFIG_BAT0_LENGTH_256_MBYTES=y
21CONFIG_BAT0_ACCESS_RW=y
22CONFIG_BAT0_ICACHE_INHIBITED=y
23CONFIG_BAT0_ICACHE_GUARDED=y
24CONFIG_BAT0_DCACHE_INHIBITED=y
25CONFIG_BAT0_DCACHE_GUARDED=y
26CONFIG_BAT0_USER_MODE_VALID=y
27CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
28CONFIG_BAT1=y
29CONFIG_BAT1_NAME="IMMR"
30CONFIG_BAT1_BASE=0xE0000000
31CONFIG_BAT1_LENGTH_4_MBYTES=y
32CONFIG_BAT1_ACCESS_RW=y
33CONFIG_BAT1_ICACHE_INHIBITED=y
34CONFIG_BAT1_ICACHE_GUARDED=y
35CONFIG_BAT1_DCACHE_INHIBITED=y
36CONFIG_BAT1_DCACHE_GUARDED=y
37CONFIG_BAT1_USER_MODE_VALID=y
38CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
39CONFIG_BAT2=y
40CONFIG_BAT2_NAME="KMBEC_FPGA"
41CONFIG_BAT2_BASE=0xE8000000
42CONFIG_BAT2_LENGTH_128_MBYTES=y
43CONFIG_BAT2_ACCESS_RW=y
44CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
45CONFIG_BAT2_DCACHE_INHIBITED=y
46CONFIG_BAT2_DCACHE_GUARDED=y
47CONFIG_BAT2_USER_MODE_VALID=y
48CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
49CONFIG_BAT3=y
50CONFIG_BAT3_NAME="FLASH"
51CONFIG_BAT3_BASE=0xF0000000
52CONFIG_BAT3_LENGTH_256_MBYTES=y
53CONFIG_BAT3_ACCESS_RW=y
54CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
55CONFIG_BAT3_DCACHE_INHIBITED=y
56CONFIG_BAT3_DCACHE_GUARDED=y
57CONFIG_BAT3_USER_MODE_VALID=y
58CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
59CONFIG_BAT4=y
60CONFIG_BAT4_NAME="STACK_IN_DCACHE"
61CONFIG_BAT4_BASE=0xE6000000
62CONFIG_BAT4_ACCESS_RW=y
63CONFIG_BAT4_USER_MODE_VALID=y
64CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
65CONFIG_BAT5=y
66CONFIG_BAT5_NAME="APP1"
67CONFIG_BAT5_BASE=0xA0000000
68CONFIG_BAT5_LENGTH_256_MBYTES=y
69CONFIG_BAT5_ACCESS_RW=y
70CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
71CONFIG_BAT5_DCACHE_INHIBITED=y
72CONFIG_BAT5_DCACHE_GUARDED=y
73CONFIG_BAT5_USER_MODE_VALID=y
74CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
Mario Sixb47839c2019-01-21 09:17:58 +0100[diff] [blame]75CONFIG_LBLAW0=y
76CONFIG_LBLAW0_BASE=0xF0000000
77CONFIG_LBLAW0_NAME="FLASH"
78CONFIG_LBLAW0_LENGTH_256_MBYTES=y
79CONFIG_LBLAW1=y
80CONFIG_LBLAW1_BASE=0xE8000000
81CONFIG_LBLAW1_NAME="KMBEC_FPGA"
82CONFIG_LBLAW1_LENGTH_128_MBYTES=y
83CONFIG_LBLAW2=y
84CONFIG_LBLAW2_BASE=0xA0000000
85CONFIG_LBLAW2_NAME="APP1"
86CONFIG_LBLAW2_LENGTH_256_MBYTES=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]87CONFIG_ELBC_BR0_OR0=y
88CONFIG_BR0_OR0_NAME="FLASH"
89CONFIG_BR0_OR0_BASE=0xF0000000
90CONFIG_BR0_PORTSIZE_16BIT=y
91CONFIG_OR0_AM_256_MBYTES=y
92CONFIG_OR0_SCY_5=y
93CONFIG_OR0_CSNT_EARLIER=y
94CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
95CONFIG_OR0_TRLX_RELAXED=y
96CONFIG_OR0_EAD_EXTRA=y
97CONFIG_ELBC_BR1_OR1=y
98CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
99CONFIG_BR1_OR1_BASE=0xE8000000
100CONFIG_OR1_AM_128_MBYTES=y
101CONFIG_OR1_SCY_2=y
102CONFIG_OR1_CSNT_EARLIER=y
103CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
104CONFIG_OR1_TRLX_RELAXED=y
105CONFIG_OR1_EAD_EXTRA=y
106CONFIG_ELBC_BR2_OR2=y
107CONFIG_BR2_OR2_NAME="APP1"
108CONFIG_BR2_OR2_BASE=0xA0000000
109CONFIG_OR2_AM_256_MBYTES=y
110CONFIG_OR2_SCY_2=y
111CONFIG_OR2_CSNT_EARLIER=y
112CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
113CONFIG_OR2_TRLX_RELAXED=y
114CONFIG_OR2_EAD_EXTRA=y
Mario Six8b2141c2019-01-21 09:18:09 +0100[diff] [blame]115CONFIG_HID0_FINAL_EMCP=y
116CONFIG_HID0_FINAL_ICE=y
117CONFIG_HID2_HBE=y
Mario Sixaa502542019-01-21 09:18:12 +0100[diff] [blame]118CONFIG_ACR_PIPE_DEP_4=y
119CONFIG_ACR_RPTCNT_4=y
120CONFIG_ACR_APARK_MASTER=y
121CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]122CONFIG_LCRR_EADC_1=y
123CONFIG_LCRR_CLKDIV_2=y
Tom Rini56838602021-12-17 18:08:36 -0500[diff] [blame]124CONFIG_83XX_PCICLK=0x3ef1480
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]125CONFIG_OF_BOARD_SETUP=y
126CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]127CONFIG_AUTOBOOT_KEYED=y
128CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
129CONFIG_AUTOBOOT_STOP_STR=" "
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]130CONFIG_BOARD_EARLY_INIT_R=y
131CONFIG_LAST_STAGE_INIT=y
132CONFIG_MISC_INIT_R=y
133CONFIG_HUSH_PARSER=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]134CONFIG_SYS_MAXARGS=32
Tom Riniae17fa32022-05-11 18:01:06 -0400[diff] [blame]135CONFIG_SYS_CBSIZE=512
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]136CONFIG_SYS_PBSIZE=532
Tom Rinif3c2f992022-06-25 19:29:46 -0400[diff] [blame]137CONFIG_SYS_BOOTM_LEN=0x2000000
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]138CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]139CONFIG_CMD_ASKENV=y
140CONFIG_CMD_GREPENV=y
Simon Glass4590d4e2017-05-17 03:25:10 -0600[diff] [blame]141CONFIG_CMD_EEPROM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]142CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
143CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]144CONFIG_CMD_I2C=y
145CONFIG_CMD_DHCP=y
Tom Rini1c47c4a2022-02-25 11:19:50 -0500[diff] [blame]146CONFIG_BOOTP_BOOTFILESIZE=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]147CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]148CONFIG_CMD_PING=y
Simon Glassc4abb4b2017-05-17 03:25:37 -0600[diff] [blame]149CONFIG_CMD_JFFS2=y
Tom Rini2b62b912018-11-13 19:54:45 -0500[diff] [blame]150CONFIG_CMD_MTDPARTS=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]151CONFIG_MTDIDS_DEFAULT="nor0=boot"
152CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]153CONFIG_CMD_UBI=y
Tom Rinic20bb732017-07-22 18:36:16 -0400[diff] [blame]154# CONFIG_CMD_UBIFS is not set
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]155CONFIG_ENV_OVERWRITE=y
Tom Rini4bb26a42019-11-10 11:28:03 -0500[diff] [blame]156CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]157CONFIG_ENV_ADDR_REDUND=0xF00E0000
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]158CONFIG_USE_ETHPRIME=y
159CONFIG_ETHPRIME="UEC0"
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]160CONFIG_VERSION_VARIABLE=y
Lukasz Majewski6dd8c902018-02-09 23:50:57 +0100[diff] [blame]161CONFIG_BOOTCOUNT_LIMIT=y
Heiko Schocher3c521072020-02-03 07:43:57 +0100[diff] [blame]162CONFIG_DM_BOOTCOUNT=y
163CONFIG_BOOTCOUNT_MEM=y
Tom Rini5f4f84e2022-06-25 11:02:49 -0400[diff] [blame]164CONFIG_SYS_BOOTCOUNT_BE=y
Tom Rinif7eed202021-11-13 18:10:40 -0500[diff] [blame]165CONFIG_SYS_BR0_PRELIM_BOOL=y
166CONFIG_SYS_BR0_PRELIM=0xF0001001
167CONFIG_SYS_OR0_PRELIM=0xF0000E55
168CONFIG_SYS_BR1_PRELIM_BOOL=y
169CONFIG_SYS_BR1_PRELIM=0xE8000801
170CONFIG_SYS_OR1_PRELIM=0xF8000E25
171CONFIG_SYS_BR2_PRELIM_BOOL=y
172CONFIG_SYS_BR2_PRELIM=0xA0000801
173CONFIG_SYS_OR2_PRELIM=0xF0000C25
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]174CONFIG_SYS_I2C_LEGACY=y
Tom Rinibe94c762021-08-18 23:12:35 -0400[diff] [blame]175CONFIG_SYS_I2C_FSL=y
176CONFIG_SYS_FSL_I2C_OFFSET=0x3000
177CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
178CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
179CONFIG_SYS_I2C_SLAVE=0x7F
180CONFIG_SYS_I2C_SPEED=200000
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]181# CONFIG_MMC is not set
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]182CONFIG_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]183CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]184CONFIG_FLASH_CFI_DRIVER=y
185CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
186CONFIG_FLASH_CFI_MTD=y
187CONFIG_SYS_FLASH_PROTECTION=y
188CONFIG_SYS_FLASH_CFI=y
Heiko Schocher3c521072020-02-03 07:43:57 +0100[diff] [blame]189CONFIG_DM_ETH_PHY=y
190CONFIG_QE_UEC=y
Tom Rinif48e0252016-10-26 17:15:37 -0400[diff] [blame]191# CONFIG_PCI is not set
Heiko Schocher3c521072020-02-03 07:43:57 +0100[diff] [blame]192# CONFIG_PINCTRL_FULL is not set
Tom Rinifa911f82019-05-12 07:59:12 -0400[diff] [blame]193CONFIG_QE=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]194CONFIG_SYS_NS16550=y