blob: 4ead663cd59fc324622ea9616ec7cc702b84229f [file] [log] [blame]
Michal Simekab2829a2022-02-23 15:52:02 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Xilinx Inc.
4 */
5
6#include <common.h>
7#include <cpu_func.h>
8#include <dm.h>
9#include <errno.h>
10#include <video.h>
11#include <dm/device_compat.h>
12
13#define WIDTH 640
14#define HEIGHT 480
15
16/**
17 * struct zynqmp_dpsub_priv - Private structure
18 * @dev: Device uclass for video_ops
19 */
20struct zynqmp_dpsub_priv {
21 struct udevice *dev;
22};
23
24static int zynqmp_dpsub_probe(struct udevice *dev)
25{
26 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
27 struct zynqmp_dpsub_priv *priv = dev_get_priv(dev);
28
29 uc_priv->bpix = VIDEO_BPP16;
30 uc_priv->xsize = WIDTH;
31 uc_priv->ysize = HEIGHT;
32 uc_priv->rot = 0;
33
34 priv->dev = dev;
35
36 /* Only placeholder for power domain driver */
37 return 0;
38}
39
40static int zynqmp_dpsub_bind(struct udevice *dev)
41{
42 struct video_uc_plat *plat = dev_get_uclass_plat(dev);
43
44 plat->size = WIDTH * HEIGHT * 16;
45
46 return 0;
47}
48
49static const struct video_ops zynqmp_dpsub_ops = {
50};
51
52static const struct udevice_id zynqmp_dpsub_ids[] = {
53 { .compatible = "xlnx,zynqmp-dpsub-1.7" },
54 { }
55};
56
57U_BOOT_DRIVER(zynqmp_dpsub_video) = {
58 .name = "zynqmp_dpsub_video",
59 .id = UCLASS_VIDEO,
60 .of_match = zynqmp_dpsub_ids,
61 .ops = &zynqmp_dpsub_ops,
62 .plat_auto = sizeof(struct video_uc_plat),
63 .bind = zynqmp_dpsub_bind,
64 .probe = zynqmp_dpsub_probe,
65 .priv_auto = sizeof(struct zynqmp_dpsub_priv),
66};