blob: 97b1c18aa7d89b698db8262da380512e427e07f2 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2022, Linaro Limited
4 */
5
6#include <dt-bindings/interrupt-controller/irq.h>
7#include <dt-bindings/spmi/spmi.h>
8
9/ {
10 thermal-zones {
11 pm8550vs-c-thermal {
12 polling-delay-passive = <100>;
13 polling-delay = <0>;
14
15 thermal-sensors = <&pm8550vs_c_temp_alarm>;
16
17 trips {
18 trip0 {
19 temperature = <95000>;
20 hysteresis = <0>;
21 type = "passive";
22 };
23
24 trip1 {
25 temperature = <115000>;
26 hysteresis = <0>;
27 type = "hot";
28 };
29 };
30 };
31
32 pm8550vs-d-thermal {
33 polling-delay-passive = <100>;
34 polling-delay = <0>;
35
36 thermal-sensors = <&pm8550vs_d_temp_alarm>;
37
38 trips {
39 trip0 {
40 temperature = <95000>;
41 hysteresis = <0>;
42 type = "passive";
43 };
44
45 trip1 {
46 temperature = <115000>;
47 hysteresis = <0>;
48 type = "hot";
49 };
50 };
51 };
52
53 pm8550vs-e-thermal {
54 polling-delay-passive = <100>;
55 polling-delay = <0>;
56
57 thermal-sensors = <&pm8550vs_e_temp_alarm>;
58
59 trips {
60 trip0 {
61 temperature = <95000>;
62 hysteresis = <0>;
63 type = "passive";
64 };
65
66 trip1 {
67 temperature = <115000>;
68 hysteresis = <0>;
69 type = "hot";
70 };
71 };
72 };
73
74 pm8550vs-g-thermal {
75 polling-delay-passive = <100>;
76 polling-delay = <0>;
77
78 thermal-sensors = <&pm8550vs_g_temp_alarm>;
79
80 trips {
81 trip0 {
82 temperature = <95000>;
83 hysteresis = <0>;
84 type = "passive";
85 };
86
87 trip1 {
88 temperature = <115000>;
89 hysteresis = <0>;
90 type = "hot";
91 };
92 };
93 };
94 };
95};
96
97
98&spmi_bus {
99 pm8550vs_c: pmic@2 {
100 compatible = "qcom,pm8550", "qcom,spmi-pmic";
101 reg = <0x2 SPMI_USID>;
102 #address-cells = <1>;
103 #size-cells = <0>;
104
105 pm8550vs_c_temp_alarm: temp-alarm@a00 {
106 compatible = "qcom,spmi-temp-alarm";
107 reg = <0xa00>;
108 interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
109 #thermal-sensor-cells = <0>;
110 };
111
112 pm8550vs_c_gpios: gpio@8800 {
113 compatible = "qcom,pm8550vs-gpio", "qcom,spmi-gpio";
114 reg = <0x8800>;
115 gpio-controller;
116 gpio-ranges = <&pm8550vs_c_gpios 0 0 6>;
117 #gpio-cells = <2>;
118 interrupt-controller;
119 #interrupt-cells = <2>;
120 };
121 };
122
123 pm8550vs_d: pmic@3 {
124 compatible = "qcom,pm8550", "qcom,spmi-pmic";
125 reg = <0x3 SPMI_USID>;
126 #address-cells = <1>;
127 #size-cells = <0>;
128
129 pm8550vs_d_temp_alarm: temp-alarm@a00 {
130 compatible = "qcom,spmi-temp-alarm";
131 reg = <0xa00>;
132 interrupts = <0x3 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
133 #thermal-sensor-cells = <0>;
134 };
135
136 pm8550vs_d_gpios: gpio@8800 {
137 compatible = "qcom,pm8550vs-gpio", "qcom,spmi-gpio";
138 reg = <0x8800>;
139 gpio-controller;
140 gpio-ranges = <&pm8550vs_d_gpios 0 0 6>;
141 #gpio-cells = <2>;
142 interrupt-controller;
143 #interrupt-cells = <2>;
144 };
145 };
146
147 pm8550vs_e: pmic@4 {
148 compatible = "qcom,pm8550", "qcom,spmi-pmic";
149 reg = <0x4 SPMI_USID>;
150 #address-cells = <1>;
151 #size-cells = <0>;
152
153 pm8550vs_e_temp_alarm: temp-alarm@a00 {
154 compatible = "qcom,spmi-temp-alarm";
155 reg = <0xa00>;
156 interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
157 #thermal-sensor-cells = <0>;
158 };
159
160 pm8550vs_e_gpios: gpio@8800 {
161 compatible = "qcom,pm8550vs-gpio", "qcom,spmi-gpio";
162 reg = <0x8800>;
163 gpio-controller;
164 gpio-ranges = <&pm8550vs_e_gpios 0 0 6>;
165 #gpio-cells = <2>;
166 interrupt-controller;
167 #interrupt-cells = <2>;
168 };
169 };
170
171 pm8550vs_g: pmic@6 {
172 compatible = "qcom,pm8550", "qcom,spmi-pmic";
173 reg = <0x6 SPMI_USID>;
174 #address-cells = <1>;
175 #size-cells = <0>;
176
177 pm8550vs_g_temp_alarm: temp-alarm@a00 {
178 compatible = "qcom,spmi-temp-alarm";
179 reg = <0xa00>;
180 interrupts = <0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
181 #thermal-sensor-cells = <0>;
182 };
183
184 pm8550vs_g_gpios: gpio@8800 {
185 compatible = "qcom,pm8550vs-gpio", "qcom,spmi-gpio";
186 reg = <0x8800>;
187 gpio-controller;
188 gpio-ranges = <&pm8550vs_g_gpios 0 0 6>;
189 #gpio-cells = <2>;
190 interrupt-controller;
191 #interrupt-cells = <2>;
192 };
193 };
194};