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git01.mediatek.com / filogic / uboot / 762f85bb2e36762ee4d7395002b8181905aec690 / . / src / arm64 / mediatek / mt8173-evb.dts
blob: 3fab21f59d1834e8c02a94436b0a8c24b392d4cf [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Eddie Huang <eddie.huang@mediatek.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include "mt8173.dtsi"
10
11/ {
12 model = "MediaTek MT8173 evaluation board";
13 chassis-type = "embedded";
14 compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
15
16 aliases {
17 serial0 = &uart0;
18 serial1 = &uart1;
19 serial2 = &uart2;
20 serial3 = &uart3;
21 };
22
23 memory@40000000 {
24 device_type = "memory";
25 reg = <0 0x40000000 0 0x80000000>;
26 };
27
28 chosen { };
29
30 connector {
31 compatible = "hdmi-connector";
32 label = "hdmi";
33 type = "d";
34
35 port {
36 hdmi_connector_in: endpoint {
37 remote-endpoint = <&hdmi0_out>;
38 };
39 };
40 };
41
42 extcon_usb: extcon_iddig {
43 compatible = "linux,extcon-usb-gpio";
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]44 id-gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]45 };
46
47 usb_p1_vbus: regulator-usb-p1 {
48 compatible = "regulator-fixed";
49 regulator-name = "usb_vbus";
50 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <5000000>;
52 gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
53 enable-active-high;
54 };
55
56 usb_p0_vbus: regulator-usb-p0 {
57 compatible = "regulator-fixed";
58 regulator-name = "vbus";
59 regulator-min-microvolt = <5000000>;
60 regulator-max-microvolt = <5000000>;
61 gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
62 enable-active-high;
63 };
64};
65
66&mfg_async {
67 domain-supply = <&da9211_vgpu_reg>;
68};
69
70&cec {
71 status = "okay";
72};
73
74&cpu0 {
75 proc-supply = <&mt6397_vpca15_reg>;
76};
77
78&cpu1 {
79 proc-supply = <&mt6397_vpca15_reg>;
80};
81
82&cpu2 {
83 proc-supply = <&da9211_vcpu_reg>;
84 sram-supply = <&mt6397_vsramca7_reg>;
85};
86
87&cpu3 {
88 proc-supply = <&da9211_vcpu_reg>;
89 sram-supply = <&mt6397_vsramca7_reg>;
90};
91
92&dpi0 {
93 status = "okay";
94};
95
96&hdmi_phy {
97 status = "okay";
98};
99
100&hdmi0 {
101 status = "okay";
102
103 ports {
104 port@1 {
105 reg = <1>;
106
107 hdmi0_out: endpoint {
108 remote-endpoint = <&hdmi_connector_in>;
109 };
110 };
111 };
112};
113
114&i2c1 {
115 status = "okay";
116
117 buck: da9211@68 {
118 compatible = "dlg,da9211";
119 reg = <0x68>;
120
121 regulators {
122 da9211_vcpu_reg: BUCKA {
123 regulator-name = "VBUCKA";
124 regulator-min-microvolt = < 700000>;
125 regulator-max-microvolt = <1310000>;
126 regulator-min-microamp = <2000000>;
127 regulator-max-microamp = <4400000>;
128 regulator-ramp-delay = <10000>;
129 regulator-always-on;
130 };
131
132 da9211_vgpu_reg: BUCKB {
133 regulator-name = "VBUCKB";
134 regulator-min-microvolt = < 700000>;
135 regulator-max-microvolt = <1310000>;
136 regulator-min-microamp = <2000000>;
137 regulator-max-microamp = <3000000>;
138 regulator-ramp-delay = <10000>;
139 };
140 };
141 };
142};
143
144&mmc0 {
145 status = "okay";
146 pinctrl-names = "default", "state_uhs";
147 pinctrl-0 = <&mmc0_pins_default>;
148 pinctrl-1 = <&mmc0_pins_uhs>;
149 bus-width = <8>;
150 max-frequency = <50000000>;
151 cap-mmc-highspeed;
152 mediatek,hs200-cmd-int-delay = <26>;
153 mediatek,hs400-cmd-int-delay = <14>;
154 mediatek,hs400-cmd-resp-sel-rising;
155 vmmc-supply = <&mt6397_vemc_3v3_reg>;
156 vqmmc-supply = <&mt6397_vio18_reg>;
157 non-removable;
158};
159
160&mmc1 {
161 status = "okay";
162 pinctrl-names = "default", "state_uhs";
163 pinctrl-0 = <&mmc1_pins_default>;
164 pinctrl-1 = <&mmc1_pins_uhs>;
165 bus-width = <4>;
166 max-frequency = <50000000>;
167 cap-sd-highspeed;
168 sd-uhs-sdr25;
169 cd-gpios = <&pio 132 0>;
170 vmmc-supply = <&mt6397_vmch_reg>;
171 vqmmc-supply = <&mt6397_vmc_reg>;
172};
173
174&pio {
175 disp_pwm0_pins: disp_pwm0_pins {
176 pins1 {
177 pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
178 output-low;
179 };
180 };
181
182 mmc0_pins_default: mmc0default {
183 pins_cmd_dat {
184 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
185 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
186 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
187 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
188 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
189 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
190 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
191 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
192 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
193 input-enable;
194 bias-pull-up;
195 };
196
197 pins_clk {
198 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
199 bias-pull-down;
200 };
201
202 pins_rst {
203 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
204 bias-pull-up;
205 };
206 };
207
208 mmc1_pins_default: mmc1default {
209 pins_cmd_dat {
210 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
211 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
212 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
213 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
214 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
215 input-enable;
216 drive-strength = <MTK_DRIVE_4mA>;
217 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
218 };
219
220 pins_clk {
221 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
222 bias-pull-down;
223 drive-strength = <MTK_DRIVE_4mA>;
224 };
225
226 pins_insert {
227 pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
228 bias-pull-up;
229 };
230 };
231
232 mmc0_pins_uhs: mmc0 {
233 pins_cmd_dat {
234 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
235 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
236 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
237 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
238 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
239 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
240 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
241 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
242 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
243 input-enable;
244 drive-strength = <MTK_DRIVE_2mA>;
245 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
246 };
247
248 pins_clk {
249 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
250 drive-strength = <MTK_DRIVE_2mA>;
251 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
252 };
253
254 pins_rst {
255 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
256 bias-pull-up;
257 };
258 };
259
260 mmc1_pins_uhs: mmc1 {
261 pins_cmd_dat {
262 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
263 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
264 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
265 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
266 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
267 input-enable;
268 drive-strength = <MTK_DRIVE_4mA>;
269 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
270 };
271
272 pins_clk {
273 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
274 drive-strength = <MTK_DRIVE_4mA>;
275 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
276 };
277 };
278
279 usb_id_pins_float: usb_iddig_pull_up {
280 pins_iddig {
281 pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
282 bias-pull-up;
283 };
284 };
285
286 usb_id_pins_ground: usb_iddig_pull_down {
287 pins_iddig {
288 pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
289 bias-pull-down;
290 };
291 };
292};
293
294&pwm0 {
295 pinctrl-names = "default";
296 pinctrl-0 = <&disp_pwm0_pins>;
297 status = "okay";
298};
299
300&pwrap {
301 /* Only MT8173 E1 needs USB power domain */
302 power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
303
304 pmic: pmic {
305 compatible = "mediatek,mt6397";
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]306 interrupts-extended = <&pio 11 IRQ_TYPE_LEVEL_HIGH>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]307 interrupt-controller;
308 #interrupt-cells = <2>;
309
310 mt6397regulator: mt6397regulator {
311 compatible = "mediatek,mt6397-regulator";
312
313 mt6397_vpca15_reg: buck_vpca15 {
314 regulator-compatible = "buck_vpca15";
315 regulator-name = "vpca15";
316 regulator-min-microvolt = < 700000>;
317 regulator-max-microvolt = <1350000>;
318 regulator-ramp-delay = <12500>;
319 regulator-always-on;
320 };
321
322 mt6397_vpca7_reg: buck_vpca7 {
323 regulator-compatible = "buck_vpca7";
324 regulator-name = "vpca7";
325 regulator-min-microvolt = < 700000>;
326 regulator-max-microvolt = <1350000>;
327 regulator-ramp-delay = <12500>;
328 regulator-enable-ramp-delay = <115>;
329 };
330
331 mt6397_vsramca15_reg: buck_vsramca15 {
332 regulator-compatible = "buck_vsramca15";
333 regulator-name = "vsramca15";
334 regulator-min-microvolt = < 700000>;
335 regulator-max-microvolt = <1350000>;
336 regulator-ramp-delay = <12500>;
337 regulator-always-on;
338 };
339
340 mt6397_vsramca7_reg: buck_vsramca7 {
341 regulator-compatible = "buck_vsramca7";
342 regulator-name = "vsramca7";
343 regulator-min-microvolt = < 700000>;
344 regulator-max-microvolt = <1350000>;
345 regulator-ramp-delay = <12500>;
346 regulator-always-on;
347 };
348
349 mt6397_vcore_reg: buck_vcore {
350 regulator-compatible = "buck_vcore";
351 regulator-name = "vcore";
352 regulator-min-microvolt = < 700000>;
353 regulator-max-microvolt = <1350000>;
354 regulator-ramp-delay = <12500>;
355 regulator-always-on;
356 };
357
358 mt6397_vgpu_reg: buck_vgpu {
359 regulator-compatible = "buck_vgpu";
360 regulator-name = "vgpu";
361 regulator-min-microvolt = < 700000>;
362 regulator-max-microvolt = <1350000>;
363 regulator-ramp-delay = <12500>;
364 regulator-enable-ramp-delay = <115>;
365 };
366
367 mt6397_vdrm_reg: buck_vdrm {
368 regulator-compatible = "buck_vdrm";
369 regulator-name = "vdrm";
370 regulator-min-microvolt = <1200000>;
371 regulator-max-microvolt = <1400000>;
372 regulator-ramp-delay = <12500>;
373 regulator-always-on;
374 };
375
376 mt6397_vio18_reg: buck_vio18 {
377 regulator-compatible = "buck_vio18";
378 regulator-name = "vio18";
379 regulator-min-microvolt = <1620000>;
380 regulator-max-microvolt = <1980000>;
381 regulator-ramp-delay = <12500>;
382 regulator-always-on;
383 };
384
385 mt6397_vtcxo_reg: ldo_vtcxo {
386 regulator-compatible = "ldo_vtcxo";
387 regulator-name = "vtcxo";
388 regulator-always-on;
389 };
390
391 mt6397_va28_reg: ldo_va28 {
392 regulator-compatible = "ldo_va28";
393 regulator-name = "va28";
394 regulator-always-on;
395 };
396
397 mt6397_vcama_reg: ldo_vcama {
398 regulator-compatible = "ldo_vcama";
399 regulator-name = "vcama";
400 regulator-min-microvolt = <1500000>;
401 regulator-max-microvolt = <2800000>;
402 regulator-enable-ramp-delay = <218>;
403 };
404
405 mt6397_vio28_reg: ldo_vio28 {
406 regulator-compatible = "ldo_vio28";
407 regulator-name = "vio28";
408 regulator-always-on;
409 };
410
411 mt6397_vusb_reg: ldo_vusb {
412 regulator-compatible = "ldo_vusb";
413 regulator-name = "vusb";
414 };
415
416 mt6397_vmc_reg: ldo_vmc {
417 regulator-compatible = "ldo_vmc";
418 regulator-name = "vmc";
419 regulator-min-microvolt = <1800000>;
420 regulator-max-microvolt = <3300000>;
421 regulator-enable-ramp-delay = <218>;
422 };
423
424 mt6397_vmch_reg: ldo_vmch {
425 regulator-compatible = "ldo_vmch";
426 regulator-name = "vmch";
427 regulator-min-microvolt = <3000000>;
428 regulator-max-microvolt = <3300000>;
429 regulator-enable-ramp-delay = <218>;
430 };
431
432 mt6397_vemc_3v3_reg: ldo_vemc3v3 {
433 regulator-compatible = "ldo_vemc3v3";
434 regulator-name = "vemc_3v3";
435 regulator-min-microvolt = <3000000>;
436 regulator-max-microvolt = <3300000>;
437 regulator-enable-ramp-delay = <218>;
438 };
439
440 mt6397_vgp1_reg: ldo_vgp1 {
441 regulator-compatible = "ldo_vgp1";
442 regulator-name = "vcamd";
443 regulator-min-microvolt = <1220000>;
444 regulator-max-microvolt = <3300000>;
445 regulator-enable-ramp-delay = <240>;
446 };
447
448 mt6397_vgp2_reg: ldo_vgp2 {
449 regulator-compatible = "ldo_vgp2";
450 regulator-name = "vcamio";
451 regulator-min-microvolt = <1000000>;
452 regulator-max-microvolt = <3300000>;
453 regulator-enable-ramp-delay = <218>;
454 };
455
456 mt6397_vgp3_reg: ldo_vgp3 {
457 regulator-compatible = "ldo_vgp3";
458 regulator-name = "vcamaf";
459 regulator-min-microvolt = <1200000>;
460 regulator-max-microvolt = <3300000>;
461 regulator-enable-ramp-delay = <218>;
462 };
463
464 mt6397_vgp4_reg: ldo_vgp4 {
465 regulator-compatible = "ldo_vgp4";
466 regulator-name = "vgp4";
467 regulator-min-microvolt = <1200000>;
468 regulator-max-microvolt = <3300000>;
469 regulator-enable-ramp-delay = <218>;
470 };
471
472 mt6397_vgp5_reg: ldo_vgp5 {
473 regulator-compatible = "ldo_vgp5";
474 regulator-name = "vgp5";
475 regulator-min-microvolt = <1200000>;
476 regulator-max-microvolt = <3000000>;
477 regulator-enable-ramp-delay = <218>;
478 };
479
480 mt6397_vgp6_reg: ldo_vgp6 {
481 regulator-compatible = "ldo_vgp6";
482 regulator-name = "vgp6";
483 regulator-min-microvolt = <1200000>;
484 regulator-max-microvolt = <3300000>;
485 regulator-enable-ramp-delay = <218>;
486 };
487
488 mt6397_vibr_reg: ldo_vibr {
489 regulator-compatible = "ldo_vibr";
490 regulator-name = "vibr";
491 regulator-min-microvolt = <1300000>;
492 regulator-max-microvolt = <3300000>;
493 regulator-enable-ramp-delay = <218>;
494 };
495 };
496 };
497};
498
499&pio {
500 spi_pins_a: spi0 {
501 pins_spi {
502 pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
503 <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
504 <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
505 <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
506 };
507 };
508};
509
510&spi {
511 pinctrl-names = "default";
512 pinctrl-0 = <&spi_pins_a>;
513 mediatek,pad-select = <0>;
514 status = "okay";
515};
516
517&ssusb {
518 vusb33-supply = <&mt6397_vusb_reg>;
519 vbus-supply = <&usb_p0_vbus>;
520 extcon = <&extcon_usb>;
521 dr_mode = "otg";
522 wakeup-source;
523 pinctrl-names = "default";
524 pinctrl-0 = <&usb_id_pins_float>;
525 status = "okay";
526};
527
528&uart0 {
529 status = "okay";
530};
531
532&usb_host {
533 vusb33-supply = <&mt6397_vusb_reg>;
534 vbus-supply = <&usb_p1_vbus>;
535 status = "okay";
536};