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git01.mediatek.com / filogic / uboot / 762f85bb2e36762ee4d7395002b8181905aec690 / . / src / arm64 / amlogic / meson-sm1.dtsi
blob: 643f94d9d08e107a7c1ea6f689a910f06804e342 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 */
6
7#include "meson-g12-common.dtsi"
8#include <dt-bindings/clock/axg-audio-clkc.h>
9#include <dt-bindings/power/meson-sm1-power.h>
10#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
11#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
12
13/ {
14 compatible = "amlogic,sm1";
15
16 tdmif_a: audio-controller-0 {
17 compatible = "amlogic,axg-tdm-iface";
18 #sound-dai-cells = <0>;
19 sound-name-prefix = "TDM_A";
20 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
21 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
22 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
23 clock-names = "mclk", "sclk", "lrclk";
24 status = "disabled";
25 };
26
27 tdmif_b: audio-controller-1 {
28 compatible = "amlogic,axg-tdm-iface";
29 #sound-dai-cells = <0>;
30 sound-name-prefix = "TDM_B";
31 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
32 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
33 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
34 clock-names = "mclk", "sclk", "lrclk";
35 status = "disabled";
36 };
37
38 tdmif_c: audio-controller-2 {
39 compatible = "amlogic,axg-tdm-iface";
40 #sound-dai-cells = <0>;
41 sound-name-prefix = "TDM_C";
42 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
43 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
44 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
45 clock-names = "mclk", "sclk", "lrclk";
46 status = "disabled";
47 };
48
49 cpus {
50 #address-cells = <0x2>;
51 #size-cells = <0x0>;
52
53 cpu0: cpu@0 {
54 device_type = "cpu";
55 compatible = "arm,cortex-a55";
56 reg = <0x0 0x0>;
57 enable-method = "psci";
58 next-level-cache = <&l2>;
59 #cooling-cells = <2>;
60 };
61
62 cpu1: cpu@1 {
63 device_type = "cpu";
64 compatible = "arm,cortex-a55";
65 reg = <0x0 0x1>;
66 enable-method = "psci";
67 next-level-cache = <&l2>;
68 #cooling-cells = <2>;
69 };
70
71 cpu2: cpu@2 {
72 device_type = "cpu";
73 compatible = "arm,cortex-a55";
74 reg = <0x0 0x2>;
75 enable-method = "psci";
76 next-level-cache = <&l2>;
77 #cooling-cells = <2>;
78 };
79
80 cpu3: cpu@3 {
81 device_type = "cpu";
82 compatible = "arm,cortex-a55";
83 reg = <0x0 0x3>;
84 enable-method = "psci";
85 next-level-cache = <&l2>;
86 #cooling-cells = <2>;
87 };
88
89 l2: l2-cache0 {
90 compatible = "cache";
91 cache-level = <2>;
92 cache-unified;
93 };
94 };
95
96 cpu_opp_table: opp-table {
97 compatible = "operating-points-v2";
98 opp-shared;
99
100 opp-1000000000 {
101 opp-hz = /bits/ 64 <1000000000>;
102 opp-microvolt = <770000>;
103 };
104
105 opp-1200000000 {
106 opp-hz = /bits/ 64 <1200000000>;
107 opp-microvolt = <780000>;
108 };
109
110 opp-1404000000 {
111 opp-hz = /bits/ 64 <1404000000>;
112 opp-microvolt = <790000>;
113 };
114
115 opp-1500000000 {
116 opp-hz = /bits/ 64 <1500000000>;
117 opp-microvolt = <800000>;
118 };
119
120 opp-1608000000 {
121 opp-hz = /bits/ 64 <1608000000>;
122 opp-microvolt = <810000>;
123 };
124
125 opp-1704000000 {
126 opp-hz = /bits/ 64 <1704000000>;
127 opp-microvolt = <850000>;
128 };
129
130 opp-1800000000 {
131 opp-hz = /bits/ 64 <1800000000>;
132 opp-microvolt = <900000>;
133 };
134
135 opp-1908000000 {
136 opp-hz = /bits/ 64 <1908000000>;
137 opp-microvolt = <950000>;
138 };
139 };
140};
141
142&apb {
143 audio: bus@60000 {
144 compatible = "simple-bus";
145 reg = <0x0 0x60000 0x0 0x1000>;
146 #address-cells = <2>;
147 #size-cells = <2>;
148 ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
149
150 clkc_audio: clock-controller@0 {
151 status = "disabled";
152 compatible = "amlogic,sm1-audio-clkc";
153 reg = <0x0 0x0 0x0 0xb4>;
154 #clock-cells = <1>;
155 #reset-cells = <1>;
156
157 clocks = <&clkc CLKID_AUDIO>,
158 <&clkc CLKID_MPLL0>,
159 <&clkc CLKID_MPLL1>,
160 <&clkc CLKID_MPLL2>,
161 <&clkc CLKID_MPLL3>,
162 <&clkc CLKID_HIFI_PLL>,
163 <&clkc CLKID_FCLK_DIV3>,
164 <&clkc CLKID_FCLK_DIV4>,
165 <&clkc CLKID_FCLK_DIV5>;
166 clock-names = "pclk",
167 "mst_in0",
168 "mst_in1",
169 "mst_in2",
170 "mst_in3",
171 "mst_in4",
172 "mst_in5",
173 "mst_in6",
174 "mst_in7";
175
176 resets = <&reset RESET_AUDIO>;
177 };
178
179 toddr_a: audio-controller@100 {
180 compatible = "amlogic,sm1-toddr",
181 "amlogic,axg-toddr";
182 reg = <0x0 0x100 0x0 0x2c>;
183 #sound-dai-cells = <0>;
184 sound-name-prefix = "TODDR_A";
185 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
186 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
187 resets = <&arb AXG_ARB_TODDR_A>,
188 <&clkc_audio AUD_RESET_TODDR_A>;
189 reset-names = "arb", "rst";
190 amlogic,fifo-depth = <8192>;
191 status = "disabled";
192 };
193
194 toddr_b: audio-controller@140 {
195 compatible = "amlogic,sm1-toddr",
196 "amlogic,axg-toddr";
197 reg = <0x0 0x140 0x0 0x2c>;
198 #sound-dai-cells = <0>;
199 sound-name-prefix = "TODDR_B";
200 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
201 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
202 resets = <&arb AXG_ARB_TODDR_B>,
203 <&clkc_audio AUD_RESET_TODDR_B>;
204 reset-names = "arb", "rst";
205 amlogic,fifo-depth = <256>;
206 status = "disabled";
207 };
208
209 toddr_c: audio-controller@180 {
210 compatible = "amlogic,sm1-toddr",
211 "amlogic,axg-toddr";
212 reg = <0x0 0x180 0x0 0x2c>;
213 #sound-dai-cells = <0>;
214 sound-name-prefix = "TODDR_C";
215 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
216 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
217 resets = <&arb AXG_ARB_TODDR_C>,
218 <&clkc_audio AUD_RESET_TODDR_C>;
219 reset-names = "arb", "rst";
220 amlogic,fifo-depth = <256>;
221 status = "disabled";
222 };
223
224 frddr_a: audio-controller@1c0 {
225 compatible = "amlogic,sm1-frddr",
226 "amlogic,axg-frddr";
227 reg = <0x0 0x1c0 0x0 0x2c>;
228 #sound-dai-cells = <0>;
229 sound-name-prefix = "FRDDR_A";
230 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
231 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
232 resets = <&arb AXG_ARB_FRDDR_A>,
233 <&clkc_audio AUD_RESET_FRDDR_A>;
234 reset-names = "arb", "rst";
235 amlogic,fifo-depth = <512>;
236 status = "disabled";
237 };
238
239 frddr_b: audio-controller@200 {
240 compatible = "amlogic,sm1-frddr",
241 "amlogic,axg-frddr";
242 reg = <0x0 0x200 0x0 0x2c>;
243 #sound-dai-cells = <0>;
244 sound-name-prefix = "FRDDR_B";
245 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
246 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
247 resets = <&arb AXG_ARB_FRDDR_B>,
248 <&clkc_audio AUD_RESET_FRDDR_B>;
249 reset-names = "arb", "rst";
250 amlogic,fifo-depth = <256>;
251 status = "disabled";
252 };
253
254 frddr_c: audio-controller@240 {
255 compatible = "amlogic,sm1-frddr",
256 "amlogic,axg-frddr";
257 reg = <0x0 0x240 0x0 0x2c>;
258 #sound-dai-cells = <0>;
259 sound-name-prefix = "FRDDR_C";
260 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
261 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
262 resets = <&arb AXG_ARB_FRDDR_C>,
263 <&clkc_audio AUD_RESET_FRDDR_C>;
264 reset-names = "arb", "rst";
265 amlogic,fifo-depth = <256>;
266 status = "disabled";
267 };
268
269 arb: reset-controller@280 {
270 status = "disabled";
271 compatible = "amlogic,meson-sm1-audio-arb";
272 reg = <0x0 0x280 0x0 0x4>;
273 #reset-cells = <1>;
274 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
275 };
276
277 tdmin_a: audio-controller@300 {
278 compatible = "amlogic,sm1-tdmin",
279 "amlogic,axg-tdmin";
280 reg = <0x0 0x300 0x0 0x40>;
281 sound-name-prefix = "TDMIN_A";
282 resets = <&clkc_audio AUD_RESET_TDMIN_A>;
283 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
284 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
285 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
286 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
287 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
288 clock-names = "pclk", "sclk", "sclk_sel",
289 "lrclk", "lrclk_sel";
290 status = "disabled";
291 };
292
293 tdmin_b: audio-controller@340 {
294 compatible = "amlogic,sm1-tdmin",
295 "amlogic,axg-tdmin";
296 reg = <0x0 0x340 0x0 0x40>;
297 sound-name-prefix = "TDMIN_B";
298 resets = <&clkc_audio AUD_RESET_TDMIN_B>;
299 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
300 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
301 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
302 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
303 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
304 clock-names = "pclk", "sclk", "sclk_sel",
305 "lrclk", "lrclk_sel";
306 status = "disabled";
307 };
308
309 tdmin_c: audio-controller@380 {
310 compatible = "amlogic,sm1-tdmin",
311 "amlogic,axg-tdmin";
312 reg = <0x0 0x380 0x0 0x40>;
313 sound-name-prefix = "TDMIN_C";
314 resets = <&clkc_audio AUD_RESET_TDMIN_C>;
315 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
316 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
317 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
318 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
319 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
320 clock-names = "pclk", "sclk", "sclk_sel",
321 "lrclk", "lrclk_sel";
322 status = "disabled";
323 };
324
325 tdmin_lb: audio-controller@3c0 {
326 compatible = "amlogic,sm1-tdmin",
327 "amlogic,axg-tdmin";
328 reg = <0x0 0x3c0 0x0 0x40>;
329 sound-name-prefix = "TDMIN_LB";
330 resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
331 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
332 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
333 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
334 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
335 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
336 clock-names = "pclk", "sclk", "sclk_sel",
337 "lrclk", "lrclk_sel";
338 status = "disabled";
339 };
340
341 spdifin: audio-controller@400 {
342 compatible = "amlogic,g12a-spdifin",
343 "amlogic,axg-spdifin";
344 reg = <0x0 0x400 0x0 0x30>;
345 #sound-dai-cells = <0>;
346 sound-name-prefix = "SPDIFIN";
347 interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
348 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
349 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
350 clock-names = "pclk", "refclk";
351 resets = <&clkc_audio AUD_RESET_SPDIFIN>;
352 status = "disabled";
353 };
354
355 spdifout_a: audio-controller@480 {
356 compatible = "amlogic,g12a-spdifout",
357 "amlogic,axg-spdifout";
358 reg = <0x0 0x480 0x0 0x50>;
359 #sound-dai-cells = <0>;
360 sound-name-prefix = "SPDIFOUT_A";
361 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
362 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
363 clock-names = "pclk", "mclk";
364 resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
365 status = "disabled";
366 };
367
368 tdmout_a: audio-controller@500 {
369 compatible = "amlogic,sm1-tdmout";
370 reg = <0x0 0x500 0x0 0x40>;
371 sound-name-prefix = "TDMOUT_A";
372 resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
373 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
374 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
375 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
376 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
377 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
378 clock-names = "pclk", "sclk", "sclk_sel",
379 "lrclk", "lrclk_sel";
380 status = "disabled";
381 };
382
383 tdmout_b: audio-controller@540 {
384 compatible = "amlogic,sm1-tdmout";
385 reg = <0x0 0x540 0x0 0x40>;
386 sound-name-prefix = "TDMOUT_B";
387 resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
388 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
389 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
390 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
391 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
392 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
393 clock-names = "pclk", "sclk", "sclk_sel",
394 "lrclk", "lrclk_sel";
395 status = "disabled";
396 };
397
398 tdmout_c: audio-controller@580 {
399 compatible = "amlogic,sm1-tdmout";
400 reg = <0x0 0x580 0x0 0x40>;
401 sound-name-prefix = "TDMOUT_C";
402 resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
403 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
404 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
405 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
406 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
407 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
408 clock-names = "pclk", "sclk", "sclk_sel",
409 "lrclk", "lrclk_sel";
410 status = "disabled";
411 };
412
413 toacodec: audio-controller@740 {
414 compatible = "amlogic,sm1-toacodec",
415 "amlogic,g12a-toacodec";
416 reg = <0x0 0x740 0x0 0x4>;
417 #sound-dai-cells = <1>;
418 sound-name-prefix = "TOACODEC";
419 resets = <&clkc_audio AUD_RESET_TOACODEC>;
420 status = "disabled";
421 };
422
423 tohdmitx: audio-controller@744 {
424 compatible = "amlogic,sm1-tohdmitx",
425 "amlogic,g12a-tohdmitx";
426 reg = <0x0 0x744 0x0 0x4>;
427 #sound-dai-cells = <1>;
428 sound-name-prefix = "TOHDMITX";
429 resets = <&clkc_audio AUD_RESET_TOHDMITX>;
430 status = "disabled";
431 };
432
433 toddr_d: audio-controller@840 {
434 compatible = "amlogic,sm1-toddr",
435 "amlogic,axg-toddr";
436 reg = <0x0 0x840 0x0 0x2c>;
437 #sound-dai-cells = <0>;
438 sound-name-prefix = "TODDR_D";
439 interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
440 clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
441 resets = <&arb AXG_ARB_TODDR_D>,
442 <&clkc_audio AUD_RESET_TODDR_D>;
443 reset-names = "arb", "rst";
444 amlogic,fifo-depth = <256>;
445 status = "disabled";
446 };
447
448 frddr_d: audio-controller@880 {
449 compatible = "amlogic,sm1-frddr",
450 "amlogic,axg-frddr";
451 reg = <0x0 0x880 0x0 0x2c>;
452 #sound-dai-cells = <0>;
453 sound-name-prefix = "FRDDR_D";
454 interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
455 clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
456 resets = <&arb AXG_ARB_FRDDR_D>,
457 <&clkc_audio AUD_RESET_FRDDR_D>;
458 reset-names = "arb", "rst";
459 amlogic,fifo-depth = <256>;
460 status = "disabled";
461 };
462 };
463
464 pdm: audio-controller@61000 {
465 compatible = "amlogic,sm1-pdm",
466 "amlogic,axg-pdm";
467 reg = <0x0 0x61000 0x0 0x34>;
468 #sound-dai-cells = <0>;
469 sound-name-prefix = "PDM";
470 clocks = <&clkc_audio AUD_CLKID_PDM>,
471 <&clkc_audio AUD_CLKID_PDM_DCLK>,
472 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
473 clock-names = "pclk", "dclk", "sysclk";
474 resets = <&clkc_audio AUD_RESET_PDM>;
475 status = "disabled";
476 };
477};
478
479&cecb_AO {
480 compatible = "amlogic,meson-sm1-ao-cec";
481};
482
483&clk_msr {
484 compatible = "amlogic,meson-sm1-clk-measure";
485};
486
487
488&clkc {
489 compatible = "amlogic,sm1-clkc";
490};
491
492&cpu_thermal {
493 cooling-maps {
494 map0 {
495 trip = <&cpu_passive>;
496 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
497 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
498 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
499 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
500 };
501
502 map1 {
503 trip = <&cpu_hot>;
504 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
505 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
506 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
507 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
508 };
509 };
510};
511
512&ethmac {
513 power-domains = <&pwrc PWRC_SM1_ETH_ID>;
514};
515
516&gpio_intc {
517 compatible = "amlogic,meson-sm1-gpio-intc",
518 "amlogic,meson-gpio-intc";
519};
520
521&pcie {
522 power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
523};
524
525&pmu {
526 compatible = "amlogic,sm1-ddr-pmu";
527};
528
529&pwrc {
530 compatible = "amlogic,meson-sm1-pwrc";
531};
532
533&simplefb_cvbs {
534 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
535};
536
537&simplefb_hdmi {
538 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
539};
540
541&vdec {
542 compatible = "amlogic,sm1-vdec";
543};
544
545&vpu {
546 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
547};
548
549&usb {
550 power-domains = <&pwrc PWRC_SM1_USB_ID>;
551};
552
553&npu {
554 power-domains = <&pwrc PWRC_SM1_NNA_ID>;
555};