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git01.mediatek.com / filogic / uboot / 762f85bb2e36762ee4d7395002b8181905aec690 / . / src / arm64 / amlogic / meson-g12a-fbx8am.dts
blob: af211d8f39520db4f7d12f3db9bca9307085fd2c [file] [log] [blame]
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2// Copyright (c) 2024 Freebox SAS
3
4/*
5 * SEI codename: SEI530FB (based on SEI510)
6 * Freebox codename: fbx8am
7 * Commercial names: Freebox Pop, Player TV Free 4K
8 */
9
10/dts-v1/;
11
12#include "meson-g12a.dtsi"
13#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/input/input.h>
15#include <dt-bindings/gpio/meson-g12a-gpio.h>
16#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
17
18/ {
19 compatible = "freebox,fbx8am", "amlogic,g12a";
20 model = "Freebox Player Pop";
21 chassis-type = "embedded";
22
23 firmware {
24 optee {
25 compatible = "linaro,optee-tz";
26 method = "smc";
27 };
28 };
29
30 gpio-keys-polled {
31 compatible = "gpio-keys-polled";
32 poll-interval = <100>;
33
34 /* Physical user-accessible reset button near USB port */
35 power-button {
36 label = "Reset";
37 linux,code = <BTN_MISC>;
38 gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
39 };
40 };
41
42 spdif_dit: audio-codec-2 {
43 #sound-dai-cells = <0>;
44 compatible = "linux,spdif-dit";
45 status = "okay";
46 sound-name-prefix = "DIT";
47 };
48
49 aliases {
50 serial0 = &uart_AO;
51 ethernet0 = &ethmac;
52 };
53
54 chosen {
55 stdout-path = "serial0:115200n8";
56 };
57
58 emmc_pwrseq: emmc-pwrseq {
59 compatible = "mmc-pwrseq-emmc";
60 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
61 };
62
63 hdmi-connector {
64 compatible = "hdmi-connector";
65 type = "a";
66
67 port {
68 hdmi_connector_in: endpoint {
69 remote-endpoint = <&hdmi_tx_tmds_out>;
70 };
71 };
72 };
73
74 memory@0 {
75 device_type = "memory";
76 reg = <0x0 0x0 0x0 0x80000000>;
77 };
78
79 ao_5v: regulator-ao-5v {
80 compatible = "regulator-fixed";
81 regulator-name = "AO_5V";
82 regulator-min-microvolt = <5000000>;
83 regulator-max-microvolt = <5000000>;
84 vin-supply = <&dc_in>;
85 regulator-always-on;
86 };
87
88 dc_in: regulator-dc-in {
89 compatible = "regulator-fixed";
90 regulator-name = "DC_IN";
91 regulator-min-microvolt = <12000000>;
92 regulator-max-microvolt = <12000000>;
93 regulator-always-on;
94 };
95
96 emmc_1v8: regulator-emmc-1v8 {
97 compatible = "regulator-fixed";
98 regulator-name = "EMMC_1V8";
99 regulator-min-microvolt = <1800000>;
100 regulator-max-microvolt = <1800000>;
101 vin-supply = <&vddao_3v3>;
102 regulator-always-on;
103 };
104
105 vddao_3v3: regulator-vddao-3v3 {
106 compatible = "regulator-fixed";
107 regulator-name = "VDDAO_3V3";
108 regulator-min-microvolt = <3300000>;
109 regulator-max-microvolt = <3300000>;
110 vin-supply = <&ao_5v>;
111 regulator-always-on;
112 };
113
114 vddao_3v3_t: regulator-vddao-3v3-t {
115 compatible = "regulator-fixed";
116 regulator-name = "VDDAO_3V3_T";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119 vin-supply = <&vddao_3v3>;
120 gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
121 enable-active-high;
122 };
123
124 vddcpu: regulator-vddcpu {
125 /*
126 * SY8120B1ABC DC/DC Regulator.
127 */
128 compatible = "pwm-regulator";
129
130 regulator-name = "VDDCPU";
131 regulator-min-microvolt = <721000>;
132 regulator-max-microvolt = <1022000>;
133
134 pwm-supply = <&ao_5v>;
135
136 pwms = <&pwm_AO_cd 1 1250 0>;
137 pwm-dutycycle-range = <100 0>;
138
139 regulator-boot-on;
140 regulator-always-on;
141 };
142
143 vddio_ao1v8: regulator-vddio-ao1v8 {
144 compatible = "regulator-fixed";
145 regulator-name = "VDDIO_AO1V8";
146 regulator-min-microvolt = <1800000>;
147 regulator-max-microvolt = <1800000>;
148 vin-supply = <&vddao_3v3>;
149 regulator-always-on;
150 };
151
152 sdio_pwrseq: sdio-pwrseq {
153 compatible = "mmc-pwrseq-simple";
154 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
155 post-power-on-delay-ms = <10>; /* required for 43752 */
156 clocks = <&wifi32k>;
157 clock-names = "ext_clock";
158 };
159
160 wifi32k: wifi32k {
161 compatible = "pwm-clock";
162 #clock-cells = <0>;
163 clock-frequency = <32768>;
164 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
165 };
166
167 sound {
168 compatible = "amlogic,axg-sound-card";
169 model = "fbx8am";
170 audio-aux-devs = <&tdmout_b>;
171 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
172 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
173 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
174 "TDM_B Playback", "TDMOUT_B OUT",
175 "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
176 "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
177 "SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
178
179 assigned-clocks = <&clkc CLKID_MPLL2>,
180 <&clkc CLKID_MPLL0>,
181 <&clkc CLKID_MPLL1>;
182 assigned-clock-parents = <0>, <0>, <0>;
183 assigned-clock-rates = <294912000>,
184 <270950400>,
185 <393216000>;
186
187 dai-link-0 {
188 sound-dai = <&frddr_a>;
189 };
190
191 dai-link-1 {
192 sound-dai = <&frddr_b>;
193 };
194
195 dai-link-2 {
196 sound-dai = <&frddr_c>;
197 };
198
199 /* 8ch hdmi interface */
200 dai-link-3 {
201 sound-dai = <&tdmif_b>;
202 dai-format = "i2s";
203 dai-tdm-slot-tx-mask-0 = <1 1>;
204 dai-tdm-slot-tx-mask-1 = <1 1>;
205 dai-tdm-slot-tx-mask-2 = <1 1>;
206 dai-tdm-slot-tx-mask-3 = <1 1>;
207 mclk-fs = <256>;
208
209 codec {
210 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
211 };
212 };
213
214 /* spdif hdmi or toslink interface */
215 dai-link-4 {
216 sound-dai = <&spdifout_a>;
217
218 codec-0 {
219 sound-dai = <&spdif_dit>;
220 };
221
222 codec-1 {
223 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
224 };
225 };
226
227 /* spdif hdmi interface */
228 dai-link-5 {
229 sound-dai = <&spdifout_b>;
230
231 codec {
232 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
233 };
234 };
235
236 /* hdmi glue */
237 dai-link-6 {
238 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
239
240 codec {
241 sound-dai = <&hdmi_tx>;
242 };
243 };
244 };
245};
246
247&arb {
248 status = "okay";
249};
250
251&cecb_AO {
252 pinctrl-0 = <&cec_ao_b_h_pins>;
253 pinctrl-names = "default";
254 status = "okay";
255 hdmi-phandle = <&hdmi_tx>;
256};
257
258&clkc_audio {
259 status = "okay";
260};
261
262&cpu0 {
263 cpu-supply = <&vddcpu>;
264 operating-points-v2 = <&cpu_opp_table>;
265 clocks = <&clkc CLKID_CPU_CLK>;
266 clock-latency = <50000>;
267};
268
269&cpu1 {
270 cpu-supply = <&vddcpu>;
271 operating-points-v2 = <&cpu_opp_table>;
272 clocks = <&clkc CLKID_CPU_CLK>;
273 clock-latency = <50000>;
274};
275
276&cpu2 {
277 cpu-supply = <&vddcpu>;
278 operating-points-v2 = <&cpu_opp_table>;
279 clocks = <&clkc CLKID_CPU_CLK>;
280 clock-latency = <50000>;
281};
282
283&cpu3 {
284 cpu-supply = <&vddcpu>;
285 operating-points-v2 = <&cpu_opp_table>;
286 clocks = <&clkc CLKID_CPU_CLK>;
287 clock-latency = <50000>;
288};
289
290&ethmac {
291 status = "okay";
292 phy-handle = <&internal_ephy>;
293 phy-mode = "rmii";
294};
295
296&frddr_a {
297 status = "okay";
298};
299
300&frddr_b {
301 status = "okay";
302};
303
304&frddr_c {
305 status = "okay";
306};
307
308&spdifout_a {
309 pinctrl-0 = <&spdif_out_h_pins>;
310 pinctrl-names = "default";
311 status = "okay";
312};
313
314&spdifout_b {
315 status = "okay";
316};
317
318&hdmi_tx {
319 status = "okay";
320 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
321 pinctrl-names = "default";
322};
323
324&hdmi_tx_tmds_port {
325 hdmi_tx_tmds_out: endpoint {
326 remote-endpoint = <&hdmi_connector_in>;
327 };
328};
329
330&i2c3 {
331 status = "okay";
332 pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
333 pinctrl-names = "default";
334};
335
336&ir {
337 status = "okay";
338 pinctrl-0 = <&remote_input_ao_pins>;
339 pinctrl-names = "default";
340};
341
342&pwm_AO_cd {
343 pinctrl-0 = <&pwm_ao_d_e_pins>;
344 pinctrl-names = "default";
345 clocks = <&xtal>;
346 clock-names = "clkin1";
347 status = "okay";
348};
349
350&pwm_ef {
351 status = "okay";
352 pinctrl-0 = <&pwm_e_pins>;
353 pinctrl-names = "default";
354 clocks = <&xtal>;
355 clock-names = "clkin0";
356};
357
358&pdm {
359 pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>,
360 <&pdm_din2_z_pins>, <&pdm_din3_z_pins>,
361 <&pdm_dclk_z_pins>;
362 pinctrl-names = "default";
363 status = "okay";
364};
365
366&saradc {
367 status = "okay";
368 vref-supply = <&vddio_ao1v8>;
369};
370
371/* SDIO */
372&sd_emmc_a {
373 status = "okay";
374 pinctrl-0 = <&sdio_pins>;
375 pinctrl-1 = <&sdio_clk_gate_pins>;
376 pinctrl-names = "default", "clk-gate";
377 #address-cells = <1>;
378 #size-cells = <0>;
379
380 bus-width = <4>;
381 cap-sd-highspeed;
382 sd-uhs-sdr50;
383 max-frequency = <100000000>;
384
385 non-removable;
386 disable-wp;
387
388 /* WiFi firmware requires power to be kept while in suspend */
389 keep-power-in-suspend;
390
391 mmc-pwrseq = <&sdio_pwrseq>;
392
393 vmmc-supply = <&vddao_3v3>;
394 vqmmc-supply = <&vddio_ao1v8>;
395};
396
397/* SD card */
398&sd_emmc_b {
399 status = "okay";
400 pinctrl-0 = <&sdcard_c_pins>;
401 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
402 pinctrl-names = "default", "clk-gate";
403
404 bus-width = <4>;
405 cap-sd-highspeed;
406 max-frequency = <50000000>;
407 disable-wp;
408
409 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
410 vmmc-supply = <&vddao_3v3>;
411 vqmmc-supply = <&vddao_3v3>;
412};
413
414/* eMMC */
415&sd_emmc_c {
416 status = "okay";
417 pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
418 pinctrl-1 = <&emmc_clk_gate_pins>;
419 pinctrl-names = "default", "clk-gate";
420
421 bus-width = <8>;
422 cap-mmc-highspeed;
423 mmc-ddr-1_8v;
424 mmc-hs200-1_8v;
425 max-frequency = <200000000>;
426 non-removable;
427 disable-wp;
428
429 mmc-pwrseq = <&emmc_pwrseq>;
430 vmmc-supply = <&vddao_3v3>;
431 vqmmc-supply = <&emmc_1v8>;
432};
433
434&tdmif_b {
435 status = "okay";
436};
437
438&tdmout_b {
439 status = "okay";
440};
441
442&tohdmitx {
443 status = "okay";
444};
445
446&uart_A {
447 status = "okay";
448 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
449 pinctrl-names = "default";
450 uart-has-rtscts;
451};
452
453&uart_AO {
454 status = "okay";
455 pinctrl-0 = <&uart_ao_a_pins>;
456 pinctrl-names = "default";
457};
458
459&usb {
460 status = "okay";
461 dr_mode = "host";
462};