blob: 8d77579807ecf84cef67aeda3931507cf31c89e1 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the GR-Peach audiocamera shield expansion board
4 *
5 * Copyright (C) 2017 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 */
7
8#include "r7s72100.dtsi"
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
11
12/ {
13 /* On-board camera clock. */
14 camera_clk: camera_clk {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <27000000>;
18 };
19};
20
21&pinctrl {
22 i2c1_pins: i2c1 {
23 /* P1_2 as SCL; P1_3 as SDA */
24 pinmux = <RZA1_PINMUX(1, 2, 1)>, <RZA1_PINMUX(1, 3, 1)>;
25 };
26
27 vio_pins: vio {
28 /* CEU pins: VIO_D[0-10], VIO_VD, VIO_HD, VIO_CLK */
29 pinmux = <RZA1_PINMUX(1, 0, 5)>, /* VIO_VD */
30 <RZA1_PINMUX(1, 1, 5)>, /* VIO_HD */
31 <RZA1_PINMUX(2, 0, 7)>, /* VIO_D0 */
32 <RZA1_PINMUX(2, 1, 7)>, /* VIO_D1 */
33 <RZA1_PINMUX(2, 2, 7)>, /* VIO_D2 */
34 <RZA1_PINMUX(2, 3, 7)>, /* VIO_D3 */
35 <RZA1_PINMUX(2, 4, 7)>, /* VIO_D4 */
36 <RZA1_PINMUX(2, 5, 7)>, /* VIO_D5 */
37 <RZA1_PINMUX(2, 6, 7)>, /* VIO_D6 */
38 <RZA1_PINMUX(2, 7, 7)>, /* VIO_D7 */
39 <RZA1_PINMUX(10, 0, 6)>; /* VIO_CLK */
40 };
41};
42
43&i2c1 {
44 pinctrl-names = "default";
45 pinctrl-0 = <&i2c1_pins>;
46
47 status = "okay";
48 clock-frequency = <100000>;
49
50 camera@48 {
51 compatible = "aptina,mt9v111";
52 reg = <0x48>;
53
54 clocks = <&camera_clk>;
55
56 port {
57 mt9v111_out: endpoint {
58 remote-endpoint = <&ceu_in>;
59 };
60 };
61 };
62};
63
64&ceu {
65 pinctrl-names = "default";
66 pinctrl-0 = <&vio_pins>;
67
68 status = "okay";
69
70 port {
71 ceu_in: endpoint {
72 remote-endpoint = <&mt9v111_out>;
73 };
74 };
75};