Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 762f85bb2e36762ee4d7395002b8181905aec690 / . / src / arm / nxp / imx / imx7d-remarkable2.dts
blob: 92cb45dacda616dafda44c32b2c1a78d85e09cc6 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Copyright (C) 2019 reMarkable AS - http://www.remarkable.com/
5 *
6 */
7
8/dts-v1/;
9
10#include "imx7d.dtsi"
11#include <dt-bindings/input/linux-event-codes.h>
12
13/ {
14 model = "reMarkable 2.0";
15 compatible = "remarkable,imx7d-remarkable2", "fsl,imx7d";
16
17 chosen {
18 stdout-path = &uart6;
19 };
20
21 memory@80000000 {
22 device_type = "memory";
23 reg = <0x80000000 0x40000000>;
24 };
25
26 thermal-zones {
27 epd-thermal {
28 thermal-sensors = <&sy7636a>;
29 polling-delay-passive = <30000>;
30 polling-delay = <30000>;
31
32 trips {
33 trip0 {
34 temperature = <49000>;
35 hysteresis = <2000>;
36 type = "passive";
37 };
38
39 trip1 {
40 temperature = <50000>;
41 hysteresis = <2000>;
42 type = "critical";
43 };
44 };
45 };
46 };
47
48 reg_brcm: regulator-brcm {
49 compatible = "regulator-fixed";
50 regulator-name = "brcm_reg";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_brcm_reg>;
55 gpio = <&gpio6 13 GPIO_ACTIVE_HIGH>;
56 enable-active-high;
57 startup-delay-us = <150>;
58 };
59
60 reg_digitizer: regulator-digitizer {
61 compatible = "regulator-fixed";
62 regulator-name = "VDD_3V3_DIGITIZER";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 pinctrl-names = "default", "sleep";
66 pinctrl-0 = <&pinctrl_digitizer_reg>;
67 pinctrl-1 = <&pinctrl_digitizer_reg>;
68 gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
69 enable-active-high;
70 startup-delay-us = <100000>; /* 100 ms */
71 };
72
73 reg_touch: regulator-touch {
74 compatible = "regulator-fixed";
75 regulator-name = "VDD_3V3_TOUCH";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
78 pinctrl-names = "default";
79 pinctrl-0 = <&pinctrl_touch_reg>;
80 gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
81 enable-active-high;
82 };
83
84 wifi_pwrseq: wifi_pwrseq {
85 compatible = "mmc-pwrseq-simple";
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_wifi>;
88 reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
89 clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
90 clock-names = "ext_clock";
91 };
92};
93
94&cpu0 {
95 cpu-supply = <&buck1>;
96};
97
98&clks {
99 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
100 <&clks IMX7D_CLKO2_ROOT_DIV>;
101 assigned-clock-parents = <&clks IMX7D_CKIL>;
102 assigned-clock-rates = <0>, <32768>;
103};
104
105&i2c1 {
106 clock-frequency = <400000>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_i2c1>;
109 status = "okay";
110
111 wacom_digitizer: digitizer@9 {
112 compatible = "hid-over-i2c";
113 reg = <0x09>;
114 hid-descr-addr = <0x01>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_wacom>;
117 interrupt-parent = <&gpio1>;
118 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
119 touchscreen-inverted-x;
120 touchscreen-inverted-y;
121 vdd-supply = <&reg_digitizer>;
122 };
123};
124
125&i2c2 {
126 clock-frequency = <100000>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_i2c2>;
129 status = "okay";
130
131 bd71815: pmic@4b {
132 compatible = "rohm,bd71815";
133 reg = <0x4b>;
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_bd71815>;
136 interrupt-parent = <&gpio6>; /* PMIC_INT_B GPIO6_IO16 */
137 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
138 gpio-controller;
139 clocks = <&clks IMX7D_CLKO2_ROOT_SRC>;
140 clock-output-names = "bd71815-32k-out";
141 #clock-cells = <0>;
142 #gpio-cells = <2>;
143
144 regulators {
145 buck1: buck1 {
146 regulator-name = "buck1";
147 regulator-min-microvolt = <800000>;
148 regulator-max-microvolt = <2000000>;
149 regulator-boot-on;
150 regulator-always-on;
151 regulator-ramp-delay = <1250>;
152 };
153
154 buck2: buck2 {
155 regulator-name = "buck2";
156 regulator-min-microvolt = <800000>;
157 regulator-max-microvolt = <2000000>;
158 regulator-boot-on;
159 regulator-always-on;
160 regulator-ramp-delay = <1250>;
161 };
162
163 buck3: buck3 {
164 regulator-name = "buck3";
165 regulator-min-microvolt = <1200000>;
166 regulator-max-microvolt = <2700000>;
167 regulator-boot-on;
168 regulator-always-on;
169 };
170
171 buck4: buck4 {
172 regulator-name = "buck4";
173 regulator-min-microvolt = <1100000>;
174 regulator-max-microvolt = <1850000>;
175 regulator-boot-on;
176 regulator-always-on;
177 };
178
179 buck5: buck5 {
180 regulator-name = "buck5";
181 regulator-min-microvolt = <1800000>;
182 regulator-max-microvolt = <3300000>;
183 regulator-boot-on;
184 regulator-always-on;
185 };
186
187 ldo1: ldo1 {
188 regulator-name = "ldo1";
189 regulator-min-microvolt = <800000>;
190 regulator-max-microvolt = <3300000>;
191 regulator-boot-on;
192 regulator-always-on;
193 };
194
195 ldo2: ldo2 {
196 regulator-name = "ldo2";
197 regulator-min-microvolt = <800000>;
198 regulator-max-microvolt = <3300000>;
199 regulator-boot-on;
200 regulator-always-on;
201 };
202
203 ldo3: ldo3 {
204 regulator-name = "ldo3";
205 regulator-min-microvolt = <800000>;
206 regulator-max-microvolt = <3300000>;
207 regulator-boot-on;
208 regulator-always-on;
209 };
210
211 ldo4: ldo4 {
212 regulator-name = "ldo4";
213 regulator-min-microvolt = <800000>;
214 regulator-max-microvolt = <3300000>;
215 regulator-boot-on;
216 regulator-always-on;
217 };
218
219 ldo5: ldo5 {
220 regulator-name = "ldo5";
221 regulator-min-microvolt = <800000>;
222 regulator-max-microvolt = <3300000>;
223 regulator-boot-on;
224 regulator-always-on;
225 };
226
227 ldo6: ldodvref {
228 regulator-name = "ldodvref";
229 regulator-boot-on;
230 regulator-always-on;
231 };
232
233 ldo7: ldolpsr {
234 regulator-name = "ldolpsr";
235 regulator-boot-on;
236 regulator-always-on;
237 };
238
239 boost: wled {
240 regulator-name = "wled";
241 regulator-min-microamp = <10>;
242 regulator-max-microamp = <25000>;
243 regulator-boot-on;
244 regulator-always-on;
245 };
246 };
247 };
248};
249
250&i2c3 {
251 clock-frequency = <100000>;
252 pinctrl-names = "default";
253 pinctrl-0 = <&pinctrl_i2c3>;
254 status = "okay";
255
256 touchscreen@24 {
257 compatible = "cypress,tt21000";
258 reg = <0x24>;
259 pinctrl-names = "default";
260 pinctrl-0 = <&pinctrl_touch>;
261 interrupt-parent = <&gpio1>;
262 interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
263 reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
264 vdd-supply = <&reg_touch>;
265 touchscreen-size-x = <880>;
266 touchscreen-size-y = <1280>;
267 #address-cells = <1>;
268 #size-cells = <0>;
269
270 button@0 {
271 reg = <0>;
272 linux,keycodes = <KEY_HOMEPAGE>;
273 };
274
275 button@1 {
276 reg = <1>;
277 linux,keycodes = <KEY_MENU>;
278 };
279
280 button@2 {
281 reg = <2>;
282 linux,keycodes = <KEY_BACK>;
283 };
284
285 button@3 {
286 reg = <3>;
287 linux,keycodes = <KEY_SEARCH>;
288 };
289
290 button@4 {
291 reg = <4>;
292 linux,keycodes = <KEY_VOLUMEDOWN>;
293 };
294
295 button@5 {
296 reg = <5>;
297 linux,keycodes = <KEY_VOLUMEUP>;
298 };
299
300 button@6 {
301 reg = <6>;
302 linux,keycodes = <KEY_CAMERA>;
303 };
304
305 button@7 {
306 reg = <7>;
307 linux,keycodes = <KEY_POWER>;
308 };
309 };
310};
311
312&i2c4 {
313 clock-frequency = <100000>;
314 pinctrl-names = "default", "sleep";
315 pinctrl-0 = <&pinctrl_i2c4>;
316 pinctrl-1 = <&pinctrl_i2c4>;
317 status = "okay";
318
319 sy7636a: pmic@62 {
320 compatible = "silergy,sy7636a";
321 reg = <0x62>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_epdpmic>;
324 #thermal-sensor-cells = <0>;
325 epd-pwr-good-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
326
327 regulators {
328 reg_epdpmic: vcom {
329 regulator-name = "vcom";
330 regulator-boot-on;
331 };
332 };
333 };
334};
335
336&snvs_pwrkey {
337 status = "okay";
338};
339
340&uart1 {
341 pinctrl-names = "default";
342 pinctrl-0 = <&pinctrl_uart1>;
343 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
344 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
345 status = "okay";
346};
347
348&uart6 {
349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_uart6>;
351 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
352 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
353 status = "okay";
354};
355
356&usbotg2 {
357 srp-disable;
358 hnp-disable;
359 status = "okay";
360};
361
362&usdhc2 {
363 #address-cells = <1>;
364 #size-cells = <0>;
365 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
366 pinctrl-0 = <&pinctrl_usdhc2>;
367 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
368 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
369 mmc-pwrseq = <&wifi_pwrseq>;
370 vmmc-supply = <&reg_brcm>;
371 bus-width = <4>;
372 non-removable;
373 keep-power-in-suspend;
374 cap-power-off-card;
375 status = "okay";
376
377 brcmf: bcrmf@1 {
378 reg = <1>;
379 compatible = "brcm,bcm4329-fmac";
380 };
381};
382
383&usdhc3 {
384 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
385 pinctrl-0 = <&pinctrl_usdhc3>;
386 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
387 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
388 pinctrl-3 = <&pinctrl_usdhc3>;
389 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
390 assigned-clock-rates = <400000000>;
391 bus-width = <8>;
392 non-removable;
393 status = "okay";
394};
395
396&wdog1 {
397 pinctrl-names = "default";
398 pinctrl-0 = <&pinctrl_wdog>;
399 fsl,ext-reset-output;
400};
401
402&iomuxc_lpsr {
403 pinctrl_digitizer_reg: digitizerreggrp {
404 fsl,pins = <
405 /* DIGITIZER_PWR_EN */
406 MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14
407 >;
408 };
409
410 pinctrl_wacom: wacomgrp {
411 fsl,pins = <
412 /*MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x00000014 FWE */
413 MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x00000074 /* PDCTB */
414 MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x00000034 /* WACOM INT */
415 /*MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x00000014 WACOM PWR ENABLE */
416 /*MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x00000074 WACOM RESET */
417 >;
418 };
419};
420
421&iomuxc {
422 pinctrl_bd71815: bd71815grp {
423 fsl,pins = <
424 MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x59
425 >;
426 };
427
428 pinctrl_brcm_reg: brcmreggrp {
429 fsl,pins = <
430 /* WIFI_PWR_EN */
431 MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13 0x14
432 >;
433 };
434
435 pinctrl_epdpmic: epdpmicgrp {
436 fsl,pins = <
437 MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21 0x00000074
438 MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x00000014
439 >;
440 };
441
442 pinctrl_touch: touchgrp {
443 fsl,pins = <
444 /* CYTTSP interrupt */
445 MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x54
446 /* CYTTSP reset */
447 MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x04
448 >;
449 };
450
451 pinctrl_i2c1: i2c1grp {
452 fsl,pins = <
453 MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
454 MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
455 >;
456 };
457
458 pinctrl_i2c2: i2c2grp {
459 fsl,pins = <
460 MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
461 MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
462 >;
463 };
464
465 pinctrl_i2c3: i2c3grp {
466 fsl,pins = <
467 MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
468 MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
469 >;
470 };
471
472 pinctrl_i2c4: i2c4grp {
473 fsl,pins = <
474 MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f
475 MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f
476 >;
477 };
478
479 pinctrl_touch_reg: touchreggrp {
480 fsl,pins = <
481 /* TOUCH_PWR_EN */
482 MX7D_PAD_GPIO1_IO11__GPIO1_IO11 0x14
483 >;
484 };
485
486 pinctrl_uart1: uart1grp {
487 fsl,pins = <
488 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
489 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
490 >;
491 };
492
493 pinctrl_uart6: uart6grp {
494 fsl,pins = <
495 MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x79
496 MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x79
497 >;
498 };
499
500 pinctrl_usdhc2: usdhc2grp {
501 fsl,pins = <
502 MX7D_PAD_SD2_CMD__SD2_CMD 0x59
503 MX7D_PAD_SD2_CLK__SD2_CLK 0x19
504 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
505 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
506 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
507 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
508 >;
509 };
510
511 pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
512 fsl,pins = <
513 MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
514 MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
515 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
516 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
517 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
518 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
519 >;
520 };
521
522 pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
523 fsl,pins = <
524 MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
525 MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
526 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
527 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
528 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
529 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
530 >;
531 };
532
533 pinctrl_usdhc3: usdhc3grp {
534 fsl,pins = <
535 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
536 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
537 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
538 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
539 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
540 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
541 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
542 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
543 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
544 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
545 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
546 >;
547 };
548
549 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
550 fsl,pins = <
551 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
552 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
553 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
554 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
555 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
556 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
557 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
558 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
559 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
560 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
561 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
562 >;
563 };
564
565 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
566 fsl,pins = <
567 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
568 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
569 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
570 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
571 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
572 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
573 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
574 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
575 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
576 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
577 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
578 >;
579 };
580
581 pinctrl_wdog: wdoggrp {
582 fsl,pins = <
583 MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY 0x74
584 >;
585 };
586
587 pinctrl_wifi: wifigrp {
588 fsl,pins = <
589 /* WiFi Reg On */
590 MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x00000014
591 /* WiFi Sleep 32k */
592 MX7D_PAD_SD1_WP__CCM_CLKO2 0x00000014
593 >;
594 };
595};