blob: e6017f9bf6409bd646559b424b79af5ffe01f4e5 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001/*
2 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively,
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
40 */
41#include <dt-bindings/sound/fsl-imx-audmux.h>
42
43/ {
Tom Rini6bb92fc2024-05-20 09:54:58 -060044 aliases {
45 rtc0 = &pcf8523;
46 rtc1 = &snvs_rtc;
47 };
48
Tom Rini53633a82024-02-29 12:33:36 -050049 /* Will be filled by the bootloader */
50 memory@10000000 {
51 device_type = "memory";
52 reg = <0x10000000 0>;
53 };
54
55 chosen {
56 stdout-path = &uart1;
57 };
58
59 ir_recv: ir-receiver {
60 compatible = "gpio-ir-receiver";
61 gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>;
64 linux,rc-map-name = "rc-rc6-mce";
65 };
66
67 v_3v2: regulator-v-3v2 {
68 compatible = "regulator-fixed";
69 regulator-always-on;
70 regulator-max-microvolt = <3300000>;
71 regulator-min-microvolt = <3300000>;
72 regulator-name = "v_3v2";
73 };
74
75 v_5v0: regulator-v-5v0 {
76 compatible = "regulator-fixed";
77 regulator-always-on;
78 regulator-max-microvolt = <5000000>;
79 regulator-min-microvolt = <5000000>;
80 regulator-name = "v_5v0";
81 };
82
83 vcc_1p8: regulator-vcc-1p8 {
84 compatible = "regulator-fixed";
85 regulator-always-on;
86 regulator-max-microvolt = <1800000>;
87 regulator-min-microvolt = <1800000>;
88 regulator-name = "vcc_1p8";
89 vin-supply = <&v_3v2>;
90 };
91
92 v_sd: regulator-v-sd {
93 compatible = "regulator-fixed";
94 gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_hummingboard2_vmmc>;
97 regulator-boot-on;
98 regulator-max-microvolt = <3300000>;
99 regulator-min-microvolt = <3300000>;
100 regulator-name = "v_sd";
101 startup-delay-us = <1000>;
102 vin-supply = <&v_3v2>;
103 };
104
105 v_usb1: regulator-v-usb1 {
106 compatible = "regulator-fixed";
107 enable-active-high;
108 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>;
111 regulator-always-on;
112 regulator-max-microvolt = <5000000>;
113 regulator-min-microvolt = <5000000>;
114 regulator-name = "v_usb1";
115 vin-supply = <&v_5v0>;
116 };
117
118 v_usb2: regulator-v-usb2 {
119 /* USB hub port 1 */
120 compatible = "regulator-fixed";
121 enable-active-high;
122 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>;
125 regulator-always-on;
126 regulator-max-microvolt = <5000000>;
127 regulator-min-microvolt = <5000000>;
128 regulator-name = "v_usb2";
129 vin-supply = <&v_5v0>;
130 };
131
132 v_usb3: regulator-v-usb3 {
133 /* USB hub port 3 */
134 compatible = "regulator-fixed";
135 enable-active-high;
136 gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>;
139 regulator-always-on;
140 regulator-max-microvolt = <5000000>;
141 regulator-min-microvolt = <5000000>;
142 regulator-name = "v_usb3";
143 vin-supply = <&v_5v0>;
144 };
145
146 v_usb4: regulator-v-usb4 {
147 /* USB hub port 4 */
148 compatible = "regulator-fixed";
149 enable-active-high;
150 gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>;
153 regulator-always-on;
154 regulator-max-microvolt = <5000000>;
155 regulator-min-microvolt = <5000000>;
156 regulator-name = "v_usb4";
157 vin-supply = <&v_5v0>;
158 };
159
160 audio: sound-sgtl5000 {
161 compatible = "simple-audio-card";
162 simple-audio-card,name = "On-board Codec";
163 simple-audio-card,format = "i2s";
164 simple-audio-card,bitclock-master = <&sound_codec>;
165 simple-audio-card,frame-master = <&sound_codec>;
166 simple-audio-card,widgets =
167 "Microphone", "Mic Jack",
168 "Headphone", "Headphone Jack";
169 simple-audio-card,routing =
170 "MIC_IN", "Mic Jack",
171 "Mic Jack", "Mic Bias",
172 "Headphone Jack", "HP_OUT";
173
174 sound_cpu: simple-audio-card,cpu {
175 sound-dai = <&ssi1>;
176 };
177
178 sound_codec: simple-audio-card,codec {
179 sound-dai = <&sgtl5000>;
180 };
181 };
182};
183
184&audmux {
185 status = "okay";
186
187 mux-ssi1 {
188 fsl,audmux-port = <0>;
189 fsl,port-config = <
190 (IMX_AUDMUX_V2_PTCR_SYN |
191 IMX_AUDMUX_V2_PTCR_TFSEL(4) |
192 IMX_AUDMUX_V2_PTCR_TCSEL(4) |
193 IMX_AUDMUX_V2_PTCR_TFSDIR |
194 IMX_AUDMUX_V2_PTCR_TCLKDIR)
195 IMX_AUDMUX_V2_PDCR_RXDSEL(4)
196 >;
197 };
198
199 mux-pins5 {
200 fsl,audmux-port = <4>;
201 fsl,port-config = <
202 IMX_AUDMUX_V2_PTCR_SYN
203 IMX_AUDMUX_V2_PDCR_RXDSEL(0)
204 >;
205 };
206};
207
208&ecspi2 {
209 pinctrl-names = "default";
210 pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>;
211 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
212 status = "okay";
213};
214
215&hdmi {
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_hummingboard2_hdmi>;
218 ddc-i2c-bus = <&i2c2>;
219 status = "okay";
220};
221
222&i2c1 {
223 clock-frequency = <100000>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_hummingboard2_i2c1>;
226 status = "okay";
227
228 pcf8523: rtc@68 {
229 compatible = "nxp,pcf8523";
230 reg = <0x68>;
231 };
232
233 sgtl5000: codec@a {
234 clocks = <&clks IMX6QDL_CLK_CKO>;
235 compatible = "fsl,sgtl5000";
236 #sound-dai-cells = <0>;
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_hummingboard2_sgtl5000>;
239 reg = <0x0a>;
240 VDDA-supply = <&v_3v2>;
241 VDDD-supply = <&vcc_1p8>;
242 VDDIO-supply = <&v_3v2>;
243 };
244};
245
246&i2c2 {
247 clock-frequency = <100000>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&pinctrl_hummingboard2_i2c2>;
250 status = "okay";
251};
252
253&i2c3 {
254 clock-frequency = <100000>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_hummingboard2_i2c3>;
257 status = "okay";
258};
259
260&iomuxc {
261 pinctrl-names = "default";
262 pinctrl-0 = <&pinctrl_hog>;
263
264 hummingboard2 {
265 pinctrl_hog: hoggrp {
266 fsl,pins = <
267 /*
268 * 36 pin headers GPIO description. The pins
269 * numbering as following -
270 *
271 * 3.2v 5v 74 75
272 * 73 72 71 70
273 * 69 68 67 66
274 *
275 * 77 78 79 76
276 * 65 64 61 60
277 * 53 52 51 50
278 * 49 48 166 132
279 * 95 94 90 91
280 * GND 54 24 204
281 *
282 * The GPIO numbers can be extracted using
283 * signal name from below.
284 * Example -
285 * MX6QDL_PAD_EIM_DA10__GPIO3_IO10 is
286 * GPIO(3,10) which is (3-1)*32+10 = gpio 74
287 *
288 * i.e. The mapping of GPIO(X,Y) to Linux gpio
289 * number is : gpio number = (X-1) * 32 + Y
290 */
291 /* DI1_PIN15 */
292 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1
293 /* DI1_PIN02 */
294 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1
295 /* DISP1_DATA00 */
296 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1
297 /* DISP1_DATA01 */
298 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1
299 /* DISP1_DATA02 */
300 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1
301 /* DISP1_DATA03 */
302 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1
303 /* DISP1_DATA04 */
304 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1
305 /* DISP1_DATA05 */
306 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1
307 /* DISP1_DATA06 */
308 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1
309 /* DISP1_DATA07 */
310 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1
311 /* DI1_D0_CS */
312 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1
313 /* DI1_D1_CS */
314 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1
315 /* DI1_PIN01 */
316 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1
317 /* DI1_PIN03 */
318 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1
319 /* DISP1_DATA08 */
320 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1
321 /* DISP1_DATA09 */
322 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1
323 /* DISP1_DATA10 */
324 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1
325 /* DISP1_DATA11 */
326 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1
327 /* DISP1_DATA12 */
328 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1
329 /* DISP1_DATA13 */
330 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1
331 /* DISP1_DATA14 */
332 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1
333 /* DISP1_DATA15 */
334 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1
335 /* DISP1_DATA16 */
336 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1
337 /* DISP1_DATA17 */
338 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1
339 /* DISP1_DATA18 */
340 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1
341 /* DISP1_DATA19 */
342 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1
343 /* DISP1_DATA20 */
344 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1
345 /* DISP1_DATA21 */
346 MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1
347 /* DISP1_DATA22 */
348 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1
349 /* DISP1_DATA23 */
350 MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1
351 /* DI1_DISP_CLK */
352 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1
353 /* SPDIF_IN */
354 MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1
355 /* SPDIF_OUT */
356 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1
357
358 /* MikroBUS GPIO pin number 10 */
359 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1
360 >;
361 };
362
363 pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp {
364 fsl,pins = <
365 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
366 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
367 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
368 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 /* CS */
369 >;
370 };
371
372 pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9 {
373 fsl,pins = <
374 MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000
375 >;
376 };
377
378 pinctrl_hummingboard2_hdmi: hummingboard2-hdmi {
379 fsl,pins = <
380 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
381 >;
382 };
383
384 pinctrl_hummingboard2_i2c1: hummingboard2-i2c1 {
385 fsl,pins = <
386 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
387 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
388 >;
389 };
390
391 pinctrl_hummingboard2_i2c2: hummingboard2-i2c2 {
392 fsl,pins = <
393 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
394 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
395 >;
396 };
397
398 pinctrl_hummingboard2_i2c3: hummingboard2-i2c3 {
399 fsl,pins = <
400 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
401 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
402 >;
403 };
404
405 pinctrl_hummingboard2_mipi: hummingboard2_mipi {
406 fsl,pins = <
407 MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1
408 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1
409 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
410 >;
411 };
412
413 pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-reset {
414 fsl,pins = <
415 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1
416 >;
417 };
418
419 pinctrl_hummingboard2_pwm1: pwm1grp {
420 fsl,pins = <
421 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
422 >;
423 };
424
425 pinctrl_hummingboard2_pwm3: pwm3grp {
426 fsl,pins = <
427 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
428 >;
429 };
430
431 pinctrl_hummingboard2_sgtl5000: hummingboard2-sgtl5000 {
432 fsl,pins = <
433 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
434 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
435 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0
436 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
437 MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
438 >;
439 };
440
441 pinctrl_hummingboard2_usbh1_vbus: hummingboard2-usbh1-vbus {
442 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
443 };
444
445 pinctrl_hummingboard2_usbh2_vbus: hummingboard2-usbh2-vbus {
446 fsl,pins = <MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0>;
447 };
448
449 pinctrl_hummingboard2_usbh3_vbus: hummingboard2-usbh3-vbus {
450 fsl,pins = <MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0>;
451 };
452
453 pinctrl_hummingboard2_usbotg_id: hummingboard2-usbotg-id {
454 /*
455 * We want it pulled down for a fixed host connection.
456 */
457 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
458 };
459
460 pinctrl_hummingboard2_usbotg_vbus: hummingboard2-usbotg-vbus {
461 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
462 };
463
464 pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux {
465 fsl,pins = <
466 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
467 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
468 >;
469 };
470
471 pinctrl_hummingboard2_usdhc2: hummingboard2-usdhc2 {
472 fsl,pins = <
473 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
474 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
475 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
476 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
477 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
478 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
479 >;
480 };
481
482 pinctrl_hummingboard2_usdhc2_100mhz: hummingboard2-usdhc2-100mhz {
483 fsl,pins = <
484 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
485 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
486 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
487 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
488 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
489 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9
490 >;
491 };
492
493 pinctrl_hummingboard2_usdhc2_200mhz: hummingboard2-usdhc2-200mhz {
494 fsl,pins = <
495 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
496 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
497 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
498 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
499 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
500 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9
501 >;
502 };
503
504 pinctrl_hummingboard2_vmmc: hummingboard2-vmmc {
505 fsl,pins = <
506 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
507 >;
508 };
509
510 pinctrl_hummingboard2_uart3: hummingboard2-uart3 {
511 fsl,pins = <
512 MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1
513 MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x40013000
514 >;
515 };
516 };
517};
518
519&pcie {
520 pinctrl-names = "default";
521 pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>;
522 reset-gpio = <&gpio2 11 GPIO_ACTIVE_LOW>;
523 status = "okay";
524};
525
526&pwm1 {
527 pinctrl-names = "default";
528 pinctrl-0 = <&pinctrl_hummingboard2_pwm1>;
529 status = "okay";
530};
531
532&pwm3 {
533 pinctrl-names = "default";
534 pinctrl-0 = <&pinctrl_hummingboard2_pwm3>;
535 status = "okay";
536};
537
538&ssi1 {
539 status = "okay";
540};
541
542&usbh1 {
543 disable-over-current;
544 status = "okay";
545};
546
547&usbotg {
548 disable-over-current;
549 pinctrl-names = "default";
550 pinctrl-0 = <&pinctrl_hummingboard2_usbotg_id>;
551 vbus-supply = <&v_usb1>;
552 status = "okay";
553};
554
555&usdhc2 {
556 pinctrl-names = "default", "state_100mhz", "state_200mhz";
557 pinctrl-0 = <
558 &pinctrl_hummingboard2_usdhc2_aux
559 &pinctrl_hummingboard2_usdhc2
560 >;
561 pinctrl-1 = <
562 &pinctrl_hummingboard2_usdhc2_aux
563 &pinctrl_hummingboard2_usdhc2_100mhz
564 >;
565 pinctrl-2 = <
566 &pinctrl_hummingboard2_usdhc2_aux
567 &pinctrl_hummingboard2_usdhc2_200mhz
568 >;
569 vmmc-supply = <&v_sd>;
570 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
571 status = "okay";
572};
573
574&uart3 {
575 pinctrl-names = "default";
576 pinctrl-0 = <&pinctrl_hummingboard2_uart3>;
577 status = "okay";
578};
579
580&vcc_3v3 {
581 vin-supply = <&v_3v2>;
582};