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git01.mediatek.com / filogic / uboot / 762f85bb2e36762ee4d7395002b8181905aec690 / . / src / arm / nxp / imx / imx6q-arm2.dts
blob: 631d6d690959fcc9760ff24cf4cbbd74a56c5423 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd.
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include "imx6q.dtsi"
10
11/ {
12 model = "Freescale i.MX6 Quad Armadillo2 Board";
13 compatible = "fsl,imx6q-arm2", "fsl,imx6q";
14
15 memory@10000000 {
16 device_type = "memory";
17 reg = <0x10000000 0x80000000>;
18 };
19
20 reg_3p3v: regulator-3p3v {
21 compatible = "regulator-fixed";
22 regulator-name = "3P3V";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
25 regulator-always-on;
26 };
27
28 reg_usb_otg_vbus: regulator-usb-otg-vbus {
29 compatible = "regulator-fixed";
30 regulator-name = "usb_otg_vbus";
31 regulator-min-microvolt = <5000000>;
32 regulator-max-microvolt = <5000000>;
33 gpio = <&gpio3 22 0>;
34 enable-active-high;
35 };
36
37 leds {
38 compatible = "gpio-leds";
39
40 debug-led {
41 label = "Heartbeat";
42 gpios = <&gpio3 25 0>;
43 linux,default-trigger = "heartbeat";
44 };
45 };
46};
47
48&gpmi {
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_gpmi_nand>;
51 status = "disabled"; /* gpmi nand conflicts with SD */
52};
53
54&iomuxc {
55 pinctrl-names = "default";
56 pinctrl-0 = <&pinctrl_hog>;
57
58 imx6q-arm2 {
59 pinctrl_hog: hoggrp {
60 fsl,pins = <
61 MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000
62 >;
63 };
64
65 pinctrl_enet: enetgrp {
66 fsl,pins = <
67 MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
68 MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
69 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
70 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
71 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
72 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
73 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
74 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
75 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
76 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
77 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
78 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
79 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
80 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
81 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
82 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
83 >;
84 };
85
86 pinctrl_gpmi_nand: gpminandgrp {
87 fsl,pins = <
88 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
89 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
90 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
91 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
92 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
93 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
94 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
95 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
96 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
97 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
98 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
99 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
100 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
101 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
102 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
103 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
104 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
105 >;
106 };
107
108 pinctrl_uart2: uart2grp {
109 fsl,pins = <
110 MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
111 MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
112 MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
113 MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
114 >;
115 };
116
117 pinctrl_uart4: uart4grp {
118 fsl,pins = <
119 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
120 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
121 >;
122 };
123
124 pinctrl_usbotg: usbotggrp {
125 fsl,pins = <
126 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
127 >;
128 };
129
130 pinctrl_usdhc3: usdhc3grp {
131 fsl,pins = <
132 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
133 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
134 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
135 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
136 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
137 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
138 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
139 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
140 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
141 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
142 >;
143 };
144
145 pinctrl_usdhc3_cdwp: usdhc3cdwp {
146 fsl,pins = <
147 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000
148 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
149 >;
150 };
151
152 pinctrl_usdhc4: usdhc4grp {
153 fsl,pins = <
154 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
155 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
156 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
157 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
158 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
159 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
160 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
161 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
162 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
163 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
164 >;
165 };
166 };
167};
168
169&fec {
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_enet>;
172 phy-mode = "rgmii";
173 /delete-property/ interrupts;
174 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
175 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
176 fsl,err006687-workaround-present;
177 status = "okay";
178};
179
180&usbotg {
181 vbus-supply = <&reg_usb_otg_vbus>;
182 pinctrl-names = "default";
183 pinctrl-0 = <&pinctrl_usbotg>;
184 disable-over-current;
185 status = "okay";
186};
187
188&usdhc3 {
189 cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
190 wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
191 vmmc-supply = <&reg_3p3v>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_usdhc3
194 &pinctrl_usdhc3_cdwp>;
195 status = "okay";
196};
197
198&usdhc4 {
199 non-removable;
200 vmmc-supply = <&reg_3p3v>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_usdhc4>;
203 status = "okay";
204};
205
206&uart2 {
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_uart2>;
209 fsl,dte-mode;
210 uart-has-rtscts;
211 status = "okay";
212};
213
214&uart4 {
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_uart4>;
217 status = "okay";
218};