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git01.mediatek.com / filogic / uboot / 762f85bb2e36762ee4d7395002b8181905aec690 / . / src / arm / nxp / imx / imx6dl-plym2m.dts
blob: dfa8110b1d97b14eae30159acc6daf74ae482eb7 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright (c) 2014 Protonic Holland
4 * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10#include "imx6dl.dtsi"
11
12/ {
13 model = "Plymovent M2M board";
14 compatible = "ply,plym2m", "fsl,imx6dl";
15
16 chosen {
17 stdout-path = &uart4;
18 };
19
20 backlight: backlight {
21 compatible = "pwm-backlight";
22 pwms = <&pwm1 0 5000000 0>;
23 brightness-levels = <0 1000>;
24 num-interpolated-steps = <20>;
25 default-brightness-level = <19>;
26 power-supply = <&reg_12v0>;
27 };
28
29 display {
30 compatible = "fsl,imx-parallel-display";
31 pinctrl-0 = <&pinctrl_ipu1_disp>;
32 pinctrl-names = "default";
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 port@0 {
37 reg = <0>;
38
39 display_in: endpoint {
40 remote-endpoint = <&ipu1_di0_disp0>;
41 };
42 };
43
44 port@1 {
45 reg = <1>;
46
47 display_out: endpoint {
48 remote-endpoint = <&panel_in>;
49 };
50 };
51 };
52
53 iio-hwmon {
54 compatible = "iio-hwmon";
55 io-channels = <&vdiv_vaccu>;
56 };
57
58 leds {
59 compatible = "gpio-leds";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_leds>;
62
63 led-0 {
64 label = "debug0";
65 function = LED_FUNCTION_STATUS;
66 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
67 linux,default-trigger = "heartbeat";
68 };
69 };
70
71 panel {
72 compatible = "edt,etm0700g0bdh6";
73 backlight = <&backlight>;
74 power-supply = <&reg_3v3>;
75
76 port {
77 panel_in: endpoint {
78 remote-endpoint = <&display_out>;
79 };
80 };
81 };
82
83 clk50m_phy: phy-clock {
84 compatible = "fixed-clock";
85 #clock-cells = <0>;
86 clock-frequency = <50000000>;
87 clock-output-names = "enet_ref_pad";
88 };
89
90 reg_3v3: regulator-3v3 {
91 compatible = "regulator-fixed";
92 regulator-name = "3v3";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 };
96
97 reg_5v0: regulator-5v0 {
98 compatible = "regulator-fixed";
99 regulator-name = "5v0";
100 regulator-min-microvolt = <5000000>;
101 regulator-max-microvolt = <5000000>;
102 };
103
104 reg_12v0: regulator-12v0 {
105 compatible = "regulator-fixed";
106 regulator-name = "12v0";
107 regulator-min-microvolt = <12000000>;
108 regulator-max-microvolt = <12000000>;
109 };
110
111 thermal-zones {
112 chassis-thermal {
113 polling-delay = <20000>;
114 polling-delay-passive = <0>;
115 thermal-sensors = <&tsens0>;
116
117 trips {
118 alert {
119 temperature = <85000>; /* millicelsius */
120 hysteresis = <2000>; /* millicelsius */
121 type = "passive";
122 };
123 };
124 };
125
126 touch-thermal0 {
127 polling-delay = <20000>;
128 polling-delay-passive = <0>;
129 thermal-sensors = <&touch_temp0>;
130
131 trips {
132 alert {
133 temperature = <85000>; /* millicelsius */
134 hysteresis = <2000>; /* millicelsius */
135 type = "passive";
136 };
137 };
138 };
139
140 touch-thermal1 {
141 polling-delay = <20000>;
142 polling-delay-passive = <0>;
143 thermal-sensors = <&touch_temp1>;
144
145 trips {
146 alert {
147 temperature = <85000>; /* millicelsius */
148 hysteresis = <2000>; /* millicelsius */
149 type = "passive";
150 };
151 };
152 };
153 };
154
155 touchscreen {
156 compatible = "resistive-adc-touch";
157 io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>,
158 <&adc_ts 5>;
159 io-channel-names = "y", "z1", "z2", "x";
160 touchscreen-min-pressure = <64687>;
161 touchscreen-inverted-x;
162 touchscreen-inverted-y;
163 touchscreen-x-plate-ohms = <300>;
164 touchscreen-y-plate-ohms = <800>;
165 };
166
167 touch_temp0: touch-temperature-sensor0 {
168 compatible = "generic-adc-thermal";
169 #thermal-sensor-cells = <0>;
170 io-channels = <&adc_ts 0>;
171 io-channel-names = "sensor-channel";
172 temperature-lookup-table = < (-40000) 736
173 85000 474>;
174 };
175
176 touch_temp1: touch-temperature-sensor1 {
177 compatible = "generic-adc-thermal";
178 #thermal-sensor-cells = <0>;
179 io-channels = <&adc_ts 7>;
180 io-channel-names = "sensor-channel";
181 temperature-lookup-table = < (-40000) 826
182 85000 609>;
183 };
184
185 vdiv_vaccu: voltage-divider-vaccu {
186 compatible = "voltage-divider";
187 io-channels = <&adc_ts 2>;
188 output-ohms = <2500>;
189 full-ohms = <64000>;
190 #io-channel-cells = <0>;
191 };
192};
193
194&can1 {
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_can1>;
197 xceiver-supply = <&reg_5v0>;
198 status = "okay";
199};
200
201&clks {
202 clocks = <&clk50m_phy>;
203 clock-names = "enet_ref_pad";
204 assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
205 assigned-clock-parents = <&clk50m_phy>;
206};
207
208&ecspi1 {
209 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_ecspi1>;
212 status = "okay";
213
214 flash@0 {
215 compatible = "jedec,spi-nor";
216 reg = <0>;
217 spi-max-frequency = <20000000>;
218 };
219};
220
221&ecspi2 {
222 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_ecspi2>;
225 status = "okay";
226
227 adc_ts: adc@0 {
228 compatible = "ti,tsc2046e-adc";
229 reg = <0>;
230 pinctrl-0 = <&pinctrl_tsc2046>;
231 pinctrl-names = "default";
232 spi-max-frequency = <1000000>;
233 interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
234 #io-channel-cells = <1>;
235
236 #address-cells = <1>;
237 #size-cells = <0>;
238
239 channel@0 {
240 reg = <0>;
241 settling-time-us = <300>;
242 oversampling-ratio = <5>;
243 };
244
245 channel@1 {
246 reg = <1>;
247 settling-time-us = <700>;
248 oversampling-ratio = <5>;
249 };
250
251 channel@2 {
252 reg = <2>;
253 settling-time-us = <300>;
254 oversampling-ratio = <5>;
255 };
256
257 channel@3 {
258 reg = <3>;
259 settling-time-us = <700>;
260 oversampling-ratio = <5>;
261 };
262
263 channel@4 {
264 reg = <4>;
265 settling-time-us = <700>;
266 oversampling-ratio = <5>;
267 };
268
269 channel@5 {
270 reg = <5>;
271 settling-time-us = <700>;
272 oversampling-ratio = <5>;
273 };
274
275 /* channel 6 is not connected */
276
277 channel@7 {
278 reg = <7>;
279 settling-time-us = <300>;
280 oversampling-ratio = <5>;
281 };
282 };
283};
284
285&fec {
286 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_enet>;
288 phy-mode = "rmii";
289 phy-handle = <&rgmii_phy>;
290 status = "okay";
291
292 mdio {
293 #address-cells = <1>;
294 #size-cells = <0>;
295
296 /* Microchip KSZ8081RNA PHY */
297 rgmii_phy: ethernet-phy@0 {
298 reg = <0>;
299 interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
300 reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
301 reset-assert-us = <10000>;
302 reset-deassert-us = <300>;
303 };
304 };
305};
306
307&gpio1 {
308 gpio-line-names =
309 "CAN1_TERM", "SD1_CD", "", "", "", "", "", "",
310 "DEBUG_0", "", "", "", "", "", "", "",
311 "", "", "", "", "", "", "", "",
312 "", "", "", "", "", "", "", "";
313};
314
315&gpio2 {
316 gpio-line-names =
317 "", "", "", "", "", "", "", "",
318 "", "", "", "", "", "", "", "",
319 "", "", "", "", "", "", "", "",
320 "", "", "ECSPI2_SS0", "", "", "", "TSC_BUSY", "";
321};
322
323&gpio3 {
324 gpio-line-names =
325 "", "", "", "", "", "", "", "",
326 "", "", "", "", "", "", "", "",
327 "", "", "", "ECSPI1_SS1", "TSC_PENIRQ", "", "", "",
328 "", "", "", "", "", "", "", "";
329};
330
331&gpio4 {
332 gpio-line-names =
333 "", "", "", "", "", "", "", "",
334 "", "", "", "", "CAN1_SR", "", "", "",
335 "", "", "", "", "", "", "", "",
336 "", "", "", "", "", "", "", "";
337};
338
339&gpio5 {
340 gpio-line-names =
341 "", "", "", "", "", "", "", "",
342 "", "", "", "", "", "", "", "",
343 "", "", "", "", "", "", "ETH_RESET", "ETH_INTRP",
344 "", "", "", "", "", "", "", "";
345};
346
347&i2c1 {
348 clock-frequency = <100000>;
349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_i2c1>;
351 status = "okay";
352
353 /* additional i2c devices are added automatically by the boot loader */
354};
355
356&i2c3 {
357 clock-frequency = <100000>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&pinctrl_i2c3>;
360 status = "okay";
361
362 tsens0: temperature-sensor@70 {
363 compatible = "ti,tmp103";
364 reg = <0x70>;
365 #thermal-sensor-cells = <0>;
366 };
367};
368
369&ipu1_di0_disp0 {
370 remote-endpoint = <&display_in>;
371};
372
373&pwm1 {
374 pinctrl-names = "default";
375 pinctrl-0 = <&pinctrl_pwm1>;
376 status = "okay";
377};
378
379&uart4 {
380 pinctrl-names = "default";
381 pinctrl-0 = <&pinctrl_uart4>;
382 status = "okay";
383};
384
385&usbphynop1 {
386 status = "disabled";
387};
388
389&usbphynop2 {
390 status = "disabled";
391};
392
393&usbotg {
394 phy_type = "utmi";
395 dr_mode = "host";
396 disable-over-current;
397 status = "okay";
398};
399
400&usdhc1 {
401 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_usdhc1>;
403 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
404 no-1-8-v;
405 disable-wp;
406 cap-sd-highspeed;
407 no-mmc;
408 no-sdio;
409 status = "okay";
410};
411
412&usdhc3 {
413 pinctrl-names = "default";
414 pinctrl-0 = <&pinctrl_usdhc3>;
415 bus-width = <8>;
416 no-1-8-v;
417 non-removable;
418 no-sd;
419 no-sdio;
420 status = "okay";
421};
422
423&iomuxc {
424 pinctrl_can1: can1grp {
425 fsl,pins = <
426 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
427 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
428 /* CAN1_SR */
429 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
430 /* CAN1_TERM */
431 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088
432 >;
433 };
434
435 pinctrl_ecspi1: ecspi1grp {
436 fsl,pins = <
437 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000
438 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008
439 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008
440 /* CS */
441 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008
442 >;
443 };
444
445 pinctrl_ecspi2: ecspi2grp {
446 fsl,pins = <
447 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x10000
448 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x3008
449 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x3008
450 /* CS */
451 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x3008
452 >;
453 };
454
455 pinctrl_enet: enetgrp {
456 fsl,pins = <
457 /* MX6QDL_ENET_PINGRP4 */
458 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
459 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
460 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
461 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
462 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
463 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
464 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
465 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
466 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
467
468 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
469 /* Phy reset */
470 MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
471 /* nINTRP */
472 MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
473 >;
474 };
475
476 pinctrl_i2c1: i2c1grp {
477 fsl,pins = <
478 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
479 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
480 >;
481 };
482
483 pinctrl_i2c3: i2c3grp {
484 fsl,pins = <
485 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
486 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
487 >;
488 };
489
490 pinctrl_ipu1_disp: ipudisp1grp {
491 fsl,pins = <
492 /* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
493 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
494 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
495 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
496 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
497 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
498 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
499 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
500 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
501 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
502 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
503 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
504 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
505 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
506 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
507 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
508 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
509 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
510 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
511 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
512 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
513 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
514 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
515 >;
516 };
517
518 pinctrl_leds: ledsgrp {
519 fsl,pins = <
520 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
521 >;
522 };
523
524 pinctrl_pwm1: pwm1grp {
525 fsl,pins = <
526 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
527 >;
528 };
529
530 pinctrl_tsc2046: tsc2046grp {
531 fsl,pins = <
532 /* TSC_PENIRQ */
533 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1
534 /* TSC_BUSY */
535 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
536 >;
537 };
538
539 pinctrl_uart4: uart4grp {
540 fsl,pins = <
541 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
542 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
543 >;
544 };
545
546 pinctrl_usdhc1: usdhc1grp {
547 fsl,pins = <
548 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
549 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
550 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
551 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
552 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
553 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
554 MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
555 >;
556 };
557
558 pinctrl_usdhc3: usdhc3grp {
559 fsl,pins = <
560 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
561 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
562 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
563 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
564 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
565 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
566 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
567 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
568 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
569 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
570 MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
571 >;
572 };
573};