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git01.mediatek.com / filogic / uboot / 762f85bb2e36762ee4d7395002b8181905aec690 / . / src / arm / nxp / imx / imx35.dtsi
blob: 442dc15677b87ed59aa8dc5109ea746cb021ac2a [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright 2012 Steffen Trumtrar, Pengutronix
4//
5// based on imx27.dtsi
6
7#include "imx35-pinfunc.h"
8
9/ {
10 #address-cells = <1>;
11 #size-cells = <1>;
12 /*
13 * The decompressor and also some bootloaders rely on a
14 * pre-existing /chosen node to be available to insert the
15 * command line and merge other ATAGS info.
16 */
17 chosen {};
18
19 aliases {
20 ethernet0 = &fec;
21 gpio0 = &gpio1;
22 gpio1 = &gpio2;
23 gpio2 = &gpio3;
24 i2c0 = &i2c1;
25 i2c1 = &i2c2;
26 i2c2 = &i2c3;
27 mmc0 = &esdhc1;
28 mmc1 = &esdhc2;
29 mmc2 = &esdhc3;
30 serial0 = &uart1;
31 serial1 = &uart2;
32 serial2 = &uart3;
33 spi0 = &spi1;
34 spi1 = &spi2;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 cpu@0 {
42 compatible = "arm,arm1136jf-s";
43 device_type = "cpu";
44 reg = <0>;
45 };
46 };
47
48 avic: avic-interrupt-controller@68000000 {
49 compatible = "fsl,imx35-avic", "fsl,avic";
50 interrupt-controller;
51 #interrupt-cells = <1>;
52 reg = <0x68000000 0x10000000>;
53 };
54
55 soc {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "simple-bus";
59 interrupt-parent = <&avic>;
60 ranges;
61
62 L2: cache-controller@30000000 {
63 compatible = "arm,l210-cache";
64 reg = <0x30000000 0x1000>;
65 cache-unified;
66 cache-level = <2>;
67 };
68
69 aips1: bus@43f00000 {
70 compatible = "fsl,aips", "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 reg = <0x43f00000 0x100000>;
74 ranges;
75
76 i2c1: i2c@43f80000 {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
80 reg = <0x43f80000 0x4000>;
81 clocks = <&clks 51>;
82 clock-names = "ipg_per";
83 interrupts = <10>;
84 status = "disabled";
85 };
86
87 i2c3: i2c@43f84000 {
88 #address-cells = <1>;
89 #size-cells = <0>;
90 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
91 reg = <0x43f84000 0x4000>;
92 clocks = <&clks 53>;
93 clock-names = "ipg_per";
94 interrupts = <3>;
95 status = "disabled";
96 };
97
98 uart1: serial@43f90000 {
99 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
100 reg = <0x43f90000 0x4000>;
101 clocks = <&clks 9>, <&clks 70>;
102 clock-names = "ipg", "per";
103 interrupts = <45>;
104 status = "disabled";
105 };
106
107 uart2: serial@43f94000 {
108 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
109 reg = <0x43f94000 0x4000>;
110 clocks = <&clks 9>, <&clks 71>;
111 clock-names = "ipg", "per";
112 interrupts = <32>;
113 status = "disabled";
114 };
115
116 i2c2: i2c@43f98000 {
117 #address-cells = <1>;
118 #size-cells = <0>;
119 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
120 reg = <0x43f98000 0x4000>;
121 clocks = <&clks 52>;
122 clock-names = "ipg_per";
123 interrupts = <4>;
124 status = "disabled";
125 };
126
127 ssi1: ssi@43fa0000 {
128 #sound-dai-cells = <0>;
129 compatible = "fsl,imx35-ssi", "fsl,imx21-ssi";
130 reg = <0x43fa0000 0x4000>;
131 interrupts = <11>;
132 clocks = <&clks 68>;
133 dmas = <&sdma 28 0 0>,
134 <&sdma 29 0 0>;
135 dma-names = "rx", "tx";
136 fsl,fifo-depth = <15>;
137 status = "disabled";
138 };
139
140 spi1: spi@43fa4000 {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 compatible = "fsl,imx35-cspi";
144 reg = <0x43fa4000 0x4000>;
145 clocks = <&clks 35 &clks 35>;
146 clock-names = "ipg", "per";
147 interrupts = <14>;
148 status = "disabled";
149 };
150
151 kpp: kpp@43fa8000 {
152 compatible = "fsl,imx35-kpp", "fsl,imx21-kpp";
153 reg = <0x43fa8000 0x4000>;
154 interrupts = <24>;
155 clocks = <&clks 56>;
156 status = "disabled";
157 };
158
159 iomuxc: iomuxc@43fac000 {
160 compatible = "fsl,imx35-iomuxc";
161 reg = <0x43fac000 0x4000>;
162 };
163 };
164
165 spba: spba-bus@50000000 {
166 compatible = "fsl,spba-bus", "simple-bus";
167 #address-cells = <1>;
168 #size-cells = <1>;
169 reg = <0x50000000 0x100000>;
170 ranges;
171
172 uart3: serial@5000c000 {
173 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
174 reg = <0x5000c000 0x4000>;
175 clocks = <&clks 9>, <&clks 72>;
176 clock-names = "ipg", "per";
177 interrupts = <18>;
178 status = "disabled";
179 };
180
181 spi2: spi@50010000 {
182 #address-cells = <1>;
183 #size-cells = <0>;
184 compatible = "fsl,imx35-cspi";
185 reg = <0x50010000 0x4000>;
186 interrupts = <13>;
187 clocks = <&clks 36 &clks 36>;
188 clock-names = "ipg", "per";
189 status = "disabled";
190 };
191
192 fec: ethernet@50038000 {
193 compatible = "fsl,imx35-fec", "fsl,imx27-fec";
194 reg = <0x50038000 0x4000>;
195 clocks = <&clks 46>, <&clks 8>;
196 clock-names = "ipg", "ahb";
197 interrupts = <57>;
198 status = "disabled";
199 };
200 };
201
202 aips2: bus@53f00000 {
203 compatible = "fsl,aips", "simple-bus";
204 #address-cells = <1>;
205 #size-cells = <1>;
206 reg = <0x53f00000 0x100000>;
207 ranges;
208
209 clks: ccm@53f80000 {
210 compatible = "fsl,imx35-ccm";
211 reg = <0x53f80000 0x4000>;
212 interrupts = <31>;
213 #clock-cells = <1>;
214 };
215
216 gpt: timer@53f90000 {
217 compatible = "fsl,imx35-gpt", "fsl,imx31-gpt";
218 reg = <0x53f90000 0x4000>;
219 interrupts = <29>;
220 clocks = <&clks 9>, <&clks 50>;
221 clock-names = "ipg", "per";
222 };
223
224 gpio3: gpio@53fa4000 {
225 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
226 reg = <0x53fa4000 0x4000>;
227 interrupts = <56>;
228 gpio-controller;
229 #gpio-cells = <2>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
232 };
233
234 esdhc1: mmc@53fb4000 {
235 compatible = "fsl,imx35-esdhc";
236 reg = <0x53fb4000 0x4000>;
237 interrupts = <7>;
238 clocks = <&clks 9>, <&clks 8>, <&clks 43>;
239 clock-names = "ipg", "ahb", "per";
240 status = "disabled";
241 };
242
243 esdhc2: mmc@53fb8000 {
244 compatible = "fsl,imx35-esdhc";
245 reg = <0x53fb8000 0x4000>;
246 interrupts = <8>;
247 clocks = <&clks 9>, <&clks 8>, <&clks 44>;
248 clock-names = "ipg", "ahb", "per";
249 status = "disabled";
250 };
251
252 esdhc3: mmc@53fbc000 {
253 compatible = "fsl,imx35-esdhc";
254 reg = <0x53fbc000 0x4000>;
255 interrupts = <9>;
256 clocks = <&clks 9>, <&clks 8>, <&clks 45>;
257 clock-names = "ipg", "ahb", "per";
258 status = "disabled";
259 };
260
261 audmux: audmux@53fc4000 {
262 compatible = "fsl,imx35-audmux", "fsl,imx31-audmux";
263 reg = <0x53fc4000 0x4000>;
264 status = "disabled";
265 };
266
267 gpio1: gpio@53fcc000 {
268 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
269 reg = <0x53fcc000 0x4000>;
270 interrupts = <52>;
271 gpio-controller;
272 #gpio-cells = <2>;
273 interrupt-controller;
274 #interrupt-cells = <2>;
275 };
276
277 gpio2: gpio@53fd0000 {
278 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
279 reg = <0x53fd0000 0x4000>;
280 interrupts = <51>;
281 gpio-controller;
282 #gpio-cells = <2>;
283 interrupt-controller;
284 #interrupt-cells = <2>;
285 };
286
287 sdma: dma-controller@53fd4000 {
288 compatible = "fsl,imx35-sdma";
289 reg = <0x53fd4000 0x4000>;
290 clocks = <&clks 9>, <&clks 65>;
291 clock-names = "ipg", "ahb";
292 #dma-cells = <3>;
293 interrupts = <34>;
294 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin";
295 };
296
297 wdog: watchdog@53fdc000 {
298 compatible = "fsl,imx35-wdt", "fsl,imx21-wdt";
299 reg = <0x53fdc000 0x4000>;
300 clocks = <&clks 74>;
301 interrupts = <55>;
302 };
303
304 can1: can@53fe4000 {
305 compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan";
306 reg = <0x53fe4000 0x1000>;
307 clocks = <&clks 33>, <&clks 33>;
308 clock-names = "ipg", "per";
309 interrupts = <43>;
310 status = "disabled";
311 };
312
313 can2: can@53fe8000 {
314 compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan";
315 reg = <0x53fe8000 0x1000>;
316 clocks = <&clks 34>, <&clks 34>;
317 clock-names = "ipg", "per";
318 interrupts = <44>;
319 status = "disabled";
320 };
321
322 efuse@53ff0000 {
323 compatible = "fsl,imx35-iim";
324 reg = <0x53ff0000 0x4000>;
325 interrupts = <19>;
326 clocks = <&clks 80>;
327 };
328
329 usbotg: usb@53ff4000 {
330 compatible = "fsl,imx35-usb", "fsl,imx27-usb";
331 reg = <0x53ff4000 0x0200>;
332 interrupts = <37>;
333 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
334 clock-names = "ipg", "ahb", "per";
335 fsl,usbmisc = <&usbmisc 0>;
336 fsl,usbphy = <&usbphy0>;
337 status = "disabled";
338 };
339
340 usbhost1: usb@53ff4400 {
341 compatible = "fsl,imx35-usb", "fsl,imx27-usb";
342 reg = <0x53ff4400 0x0200>;
343 interrupts = <35>;
344 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
345 clock-names = "ipg", "ahb", "per";
346 fsl,usbmisc = <&usbmisc 1>;
347 fsl,usbphy = <&usbphy1>;
348 dr_mode = "host";
349 status = "disabled";
350 };
351
352 usbmisc: usbmisc@53ff4600 {
353 #index-cells = <1>;
354 compatible = "fsl,imx35-usbmisc";
355 reg = <0x53ff4600 0x00f>;
356 };
357 };
358
359 emi@80000000 { /* External Memory Interface */
360 compatible = "fsl,emi", "simple-bus";
361 #address-cells = <1>;
362 #size-cells = <1>;
363 reg = <0x80000000 0x40000000>;
364 ranges;
365
366 nfc: nand@bb000000 {
367 #address-cells = <1>;
368 #size-cells = <1>;
369 compatible = "fsl,imx35-nand", "fsl,imx25-nand";
370 reg = <0xbb000000 0x2000>;
371 clocks = <&clks 29>;
372 clock-names = "";
373 interrupts = <33>;
374 status = "disabled";
375 };
376
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]377 weim: memory-controller@b8002000 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]378 #address-cells = <2>;
379 #size-cells = <1>;
380 clocks = <&clks 0>;
381 compatible = "fsl,imx35-weim", "fsl,imx27-weim";
382 reg = <0xb8002000 0x1000>;
383 ranges = <
384 0 0 0xa0000000 0x8000000
385 1 0 0xa8000000 0x8000000
386 2 0 0xb0000000 0x2000000
387 3 0 0xb2000000 0x2000000
388 4 0 0xb4000000 0x2000000
389 5 0 0xb6000000 0x2000000
390 >;
391 status = "disabled";
392 };
393 };
394 };
395
396 usbphy {
397 compatible = "simple-bus";
398 #address-cells = <1>;
399 #size-cells = <0>;
400
401 usbphy0: usb-phy@0 {
402 reg = <0>;
403 compatible = "usb-nop-xceiv";
404 #phy-cells = <0>;
405 };
406
407 usbphy1: usb-phy@1 {
408 reg = <1>;
409 compatible = "usb-nop-xceiv";
410 #phy-cells = <0>;
411 };
412 };
413};