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git01.mediatek.com / filogic / uboot / 762f85bb2e36762ee4d7395002b8181905aec690 / . / src / arm / nxp / imx / imx27-pdk.dts
blob: 21d436972aa47c57f50db2636b23b45b41c02f05 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2//
3// Copyright 2012 Sascha Hauer, Pengutronix
4
5/dts-v1/;
6#include "imx27.dtsi"
7
8/ {
9 model = "Freescale i.MX27 Product Development Kit";
10 compatible = "fsl,imx27-pdk", "fsl,imx27";
11
12 memory@a0000000 {
13 device_type = "memory";
14 reg = <0xa0000000 0x08000000>;
15 };
16
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]17
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]18 usbphy0: usbphy {
19 compatible = "usb-nop-xceiv";
20 clocks = <&clks IMX27_CLK_DUMMY>;
21 clock-names = "main_clk";
22 #phy-cells = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]23 };
24};
25
26&cspi2 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_cspi2>;
29 cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
30 status = "okay";
31
32 pmic: mc13783@0 {
33 compatible = "fsl,mc13783";
34 reg = <0>;
35 spi-cs-high;
36 spi-max-frequency = <1000000>;
37 interrupt-parent = <&gpio3>;
38 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
39
40 regulators {
41 vgen_reg: vgen {
42 regulator-min-microvolt = <1500000>;
43 regulator-max-microvolt = <1500000>;
44 regulator-always-on;
45 regulator-boot-on;
46 };
47
48 vmmc1_reg: vmmc1 {
49 regulator-min-microvolt = <1600000>;
50 regulator-max-microvolt = <3000000>;
51 };
52
53 gpo1_reg: gpo1 {
54 regulator-always-on;
55 regulator-boot-on;
56 };
57
58 gpo3_reg: gpo3 {
59 regulator-always-on;
60 regulator-boot-on;
61 };
62 };
63 };
64};
65
66&fec {
67 phy-mode = "mii";
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_fec>;
70 status = "okay";
71};
72
73&kpp {
74 linux,keymap = <
75 MATRIX_KEY(0, 0, KEY_UP)
76 MATRIX_KEY(0, 1, KEY_DOWN)
77 MATRIX_KEY(1, 0, KEY_RIGHT)
78 MATRIX_KEY(1, 1, KEY_LEFT)
79 MATRIX_KEY(1, 2, KEY_ENTER)
80 MATRIX_KEY(2, 0, KEY_F6)
81 MATRIX_KEY(2, 1, KEY_F8)
82 MATRIX_KEY(2, 2, KEY_F9)
83 MATRIX_KEY(2, 3, KEY_F10)
84 >;
85 status = "okay";
86};
87
88&nfc {
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_nand>;
91 nand-ecc-mode = "hw";
92 nand-on-flash-bbt;
93 status = "okay";
94};
95
96&uart1 {
97 uart-has-rtscts;
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_uart1>;
100 status = "okay";
101};
102
103&usbotg {
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_usbotg>;
106 dr_mode = "otg";
107 fsl,usbphy = <&usbphy0>;
108 phy_type = "ulpi";
109 status = "okay";
110};
111
112&iomuxc {
113 imx27-pdk {
114 pinctrl_cspi2: cspi2grp {
115 fsl,pins = <
116 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
117 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
118 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
119 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */
120 MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */
121 >;
122 };
123
124 pinctrl_fec: fecgrp {
125 fsl,pins = <
126 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
127 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
128 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
129 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
130 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
131 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
132 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
133 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
134 MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
135 MX27_PAD_ATA_DATA7__FEC_MDC 0x0
136 MX27_PAD_ATA_DATA8__FEC_CRS 0x0
137 MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
138 MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
139 MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
140 MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
141 MX27_PAD_ATA_DATA13__FEC_COL 0x0
142 MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
143 MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
144 >;
145 };
146
147 pinctrl_nand: nandgrp {
148 fsl,pins = <
149 MX27_PAD_NFRB__NFRB 0x0
150 MX27_PAD_NFCLE__NFCLE 0x0
151 MX27_PAD_NFWP_B__NFWP_B 0x0
152 MX27_PAD_NFCE_B__NFCE_B 0x0
153 MX27_PAD_NFALE__NFALE 0x0
154 MX27_PAD_NFRE_B__NFRE_B 0x0
155 MX27_PAD_NFWE_B__NFWE_B 0x0
156 >;
157 };
158
159 pinctrl_uart1: uart1grp {
160 fsl,pins = <
161 MX27_PAD_UART1_TXD__UART1_TXD 0x0
162 MX27_PAD_UART1_RXD__UART1_RXD 0x0
163 MX27_PAD_UART1_CTS__UART1_CTS 0x0
164 MX27_PAD_UART1_RTS__UART1_RTS 0x0
165 >;
166 };
167
168 pinctrl_usbotg: usbotggrp {
169 fsl,pins = <
170 MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
171 MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
172 MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
173 MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
174 MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
175 MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
176 MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
177 MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
178 MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
179 MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
180 MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
181 MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
182 >;
183 };
184 };
185};