| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | // Copyright (c) 2020 Facebook Inc. |
| 3 | |
| 4 | #include "aspeed-g6.dtsi" |
| 5 | #include <dt-bindings/gpio/aspeed-gpio.h> |
| 6 | |
| 7 | / { |
| 8 | aliases { |
| 9 | mmc0 = &emmc; |
| 10 | spi1 = &spi1; |
| 11 | spi2 = &spi_gpio; |
| 12 | }; |
| 13 | |
| 14 | chosen { |
| 15 | bootargs = "console=ttyS0,9600n8 root=/dev/ram rw vmalloc=640M"; |
| 16 | }; |
| 17 | |
| 18 | memory@80000000 { |
| 19 | device_type = "memory"; |
| 20 | reg = <0x80000000 0x80000000>; |
| 21 | }; |
| 22 | |
| 23 | /* |
| 24 | * GPIO-based SPI Master is required to access SPI TPM, because |
| 25 | * full-duplex SPI transactions are not supported by ASPEED SPI |
| 26 | * Controllers. |
| 27 | */ |
| 28 | spi_gpio: spi { |
| 29 | status = "okay"; |
| 30 | compatible = "spi-gpio"; |
| 31 | #address-cells = <1>; |
| 32 | #size-cells = <0>; |
| 33 | |
| 34 | gpio-sck = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>; |
| 35 | gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>; |
| 36 | gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>; |
| 37 | |
| Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 38 | tpm@0 { |
| 39 | compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 40 | spi-max-frequency = <33000000>; |
| 41 | reg = <0>; |
| 42 | }; |
| 43 | }; |
| 44 | }; |
| 45 | |
| 46 | &fmc { |
| 47 | status = "okay"; |
| 48 | |
| 49 | flash@0 { |
| 50 | status = "okay"; |
| 51 | m25p,fast-read; |
| 52 | label = "spi0.0"; |
| 53 | |
| 54 | #include "facebook-bmc-flash-layout-128.dtsi" |
| 55 | }; |
| 56 | |
| 57 | flash@1 { |
| 58 | status = "okay"; |
| 59 | m25p,fast-read; |
| 60 | label = "spi0.1"; |
| 61 | |
| 62 | partitions { |
| 63 | compatible = "fixed-partitions"; |
| 64 | #address-cells = <1>; |
| 65 | #size-cells = <1>; |
| 66 | |
| 67 | flash1@0 { |
| 68 | reg = <0x0 0x8000000>; |
| 69 | label = "flash1"; |
| 70 | }; |
| 71 | }; |
| 72 | }; |
| 73 | }; |
| 74 | |
| 75 | &spi1 { |
| 76 | status = "okay"; |
| 77 | }; |
| 78 | |
| 79 | &uart1 { |
| 80 | status = "okay"; |
| 81 | }; |
| 82 | |
| 83 | &uart2 { |
| 84 | status = "okay"; |
| 85 | }; |
| 86 | |
| 87 | &uart5 { |
| 88 | status = "okay"; |
| 89 | }; |
| 90 | |
| 91 | &wdt1 { |
| 92 | status = "okay"; |
| 93 | }; |
| 94 | |
| 95 | &i2c0 { |
| 96 | status = "okay"; |
| 97 | }; |
| 98 | |
| 99 | &i2c1 { |
| 100 | status = "okay"; |
| 101 | }; |
| 102 | |
| 103 | &i2c2 { |
| 104 | status = "okay"; |
| 105 | }; |
| 106 | |
| 107 | &i2c3 { |
| 108 | status = "okay"; |
| 109 | }; |
| 110 | |
| 111 | &i2c4 { |
| 112 | status = "okay"; |
| 113 | }; |
| 114 | |
| 115 | &i2c5 { |
| 116 | status = "okay"; |
| 117 | }; |
| 118 | |
| 119 | &i2c6 { |
| 120 | status = "okay"; |
| 121 | }; |
| 122 | |
| 123 | &i2c7 { |
| 124 | status = "okay"; |
| 125 | }; |
| 126 | |
| 127 | &i2c8 { |
| 128 | status = "okay"; |
| 129 | }; |
| 130 | |
| 131 | &i2c9 { |
| 132 | status = "okay"; |
| 133 | }; |
| 134 | |
| 135 | &i2c10 { |
| 136 | status = "okay"; |
| 137 | }; |
| 138 | |
| 139 | &i2c12 { |
| 140 | status = "okay"; |
| 141 | }; |
| 142 | |
| 143 | &i2c13 { |
| 144 | status = "okay"; |
| 145 | }; |
| 146 | |
| 147 | &i2c15 { |
| 148 | status = "okay"; |
| 149 | }; |
| 150 | |
| 151 | &vhub { |
| 152 | status = "okay"; |
| 153 | }; |
| 154 | |
| 155 | &emmc_controller { |
| 156 | status = "okay"; |
| 157 | }; |
| 158 | |
| 159 | &emmc { |
| 160 | status = "okay"; |
| 161 | |
| 162 | non-removable; |
| 163 | max-frequency = <25000000>; |
| 164 | bus-width = <4>; |
| 165 | }; |
| 166 | |
| 167 | &rtc { |
| 168 | status = "okay"; |
| 169 | }; |