Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * Copyright (C) 2013, 2014 Synopsys, Inc. (www.synopsys.com) |
| 4 | */ |
| 5 | |
| 6 | /* |
| 7 | * Device tree for AXC003 CPU card: HS38x UP configuration (VDK version) |
| 8 | */ |
| 9 | |
| 10 | /include/ "skeleton_hs.dtsi" |
| 11 | |
| 12 | / { |
| 13 | compatible = "snps,arc"; |
| 14 | #address-cells = <1>; |
| 15 | #size-cells = <1>; |
| 16 | |
| 17 | cpu_card { |
| 18 | compatible = "simple-bus"; |
| 19 | #address-cells = <1>; |
| 20 | #size-cells = <1>; |
| 21 | |
| 22 | ranges = <0x00000000 0xf0000000 0x10000000>; |
| 23 | |
| 24 | core_clk: core_clk { |
| 25 | #clock-cells = <0>; |
| 26 | compatible = "fixed-clock"; |
| 27 | clock-frequency = <50000000>; |
| 28 | }; |
| 29 | |
| 30 | core_intc: archs-intc@cpu { |
| 31 | compatible = "snps,archs-intc"; |
| 32 | interrupt-controller; |
| 33 | #interrupt-cells = <1>; |
| 34 | }; |
| 35 | |
| 36 | debug_uart: dw-apb-uart@5000 { |
| 37 | compatible = "snps,dw-apb-uart"; |
| 38 | reg = <0x5000 0x100>; |
| 39 | clock-frequency = <2403200>; |
| 40 | interrupt-parent = <&core_intc>; |
| 41 | interrupts = <19>; |
| 42 | baud = <115200>; |
| 43 | reg-shift = <2>; |
| 44 | reg-io-width = <4>; |
| 45 | }; |
| 46 | |
| 47 | }; |
| 48 | |
| 49 | mb_intc: interrupt-controller@e0012000 { |
| 50 | #interrupt-cells = <1>; |
| 51 | compatible = "snps,dw-apb-ictl"; |
| 52 | reg = < 0xe0012000 0x200 >; |
| 53 | interrupt-controller; |
| 54 | interrupt-parent = <&core_intc>; |
| 55 | interrupts = < 18 >; |
| 56 | }; |
| 57 | |
| 58 | memory { |
| 59 | #address-cells = <1>; |
| 60 | #size-cells = <1>; |
| 61 | ranges = <0x00000000 0x80000000 0x40000000>; |
| 62 | device_type = "memory"; |
| 63 | reg = <0x80000000 0x20000000>; /* 512MiB */ |
| 64 | }; |
| 65 | }; |