| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | * ENETC ethernet device tree bindings |
| 2 | |
| 3 | Depending on board design and ENETC port type (internal or |
| 4 | external) there are two supported link modes specified by |
| 5 | below device tree bindings. |
| 6 | |
| 7 | Required properties: |
| 8 | |
| 9 | - reg : Specifies PCIe Device Number and Function |
| 10 | Number of the ENETC endpoint device, according |
| 11 | to parent node bindings. |
| 12 | - compatible : Should be "fsl,enetc". |
| 13 | |
| 14 | 1. The ENETC external port is connected to a MDIO configurable phy |
| 15 | |
| 16 | 1.1. Using the local ENETC Port MDIO interface |
| 17 | |
| 18 | In this case, the ENETC node should include a "mdio" sub-node |
| 19 | that in turn should contain the "ethernet-phy" node describing the |
| 20 | external phy. Below properties are required, their bindings |
| 21 | already defined in Documentation/devicetree/bindings/net/ethernet.txt or |
| 22 | Documentation/devicetree/bindings/net/phy.txt. |
| 23 | |
| 24 | Required: |
| 25 | |
| 26 | - phy-handle : Phandle to a PHY on the MDIO bus. |
| 27 | Defined in ethernet.txt. |
| 28 | |
| 29 | - phy-connection-type : Defined in ethernet.txt. |
| 30 | |
| 31 | - mdio : "mdio" node, defined in mdio.txt. |
| 32 | |
| 33 | - ethernet-phy : "ethernet-phy" node, defined in phy.txt. |
| 34 | |
| 35 | Example: |
| 36 | |
| 37 | ethernet@0,0 { |
| 38 | compatible = "fsl,enetc"; |
| 39 | reg = <0x000000 0 0 0 0>; |
| 40 | phy-handle = <&sgmii_phy0>; |
| 41 | phy-connection-type = "sgmii"; |
| 42 | |
| 43 | mdio { |
| 44 | #address-cells = <1>; |
| 45 | #size-cells = <0>; |
| 46 | sgmii_phy0: ethernet-phy@2 { |
| 47 | reg = <0x2>; |
| 48 | }; |
| 49 | }; |
| 50 | }; |
| 51 | |
| 52 | 1.2. Using the central MDIO PCIe endpoint device |
| 53 | |
| 54 | In this case, the mdio node should be defined as another PCIe |
| 55 | endpoint node, at the same level with the ENETC port nodes. |
| 56 | |
| 57 | Required properties: |
| 58 | |
| 59 | - reg : Specifies PCIe Device Number and Function |
| 60 | Number of the ENETC endpoint device, according |
| 61 | to parent node bindings. |
| 62 | - compatible : Should be "fsl,enetc-mdio". |
| 63 | |
| 64 | The remaining required mdio bus properties are standard, their bindings |
| 65 | already defined in Documentation/devicetree/bindings/net/mdio.txt. |
| 66 | |
| 67 | Example: |
| 68 | |
| 69 | ethernet@0,0 { |
| 70 | compatible = "fsl,enetc"; |
| 71 | reg = <0x000000 0 0 0 0>; |
| 72 | phy-handle = <&sgmii_phy0>; |
| 73 | phy-connection-type = "sgmii"; |
| 74 | }; |
| 75 | |
| 76 | mdio@0,3 { |
| 77 | compatible = "fsl,enetc-mdio"; |
| 78 | reg = <0x000300 0 0 0 0>; |
| 79 | #address-cells = <1>; |
| 80 | #size-cells = <0>; |
| 81 | sgmii_phy0: ethernet-phy@2 { |
| 82 | reg = <0x2>; |
| 83 | }; |
| 84 | }; |
| 85 | |
| 86 | 2. The ENETC port is an internal port or has a fixed-link external |
| 87 | connection |
| 88 | |
| 89 | In this case, the ENETC port node defines a fixed link connection, |
| 90 | as specified by Documentation/devicetree/bindings/net/fixed-link.txt. |
| 91 | |
| 92 | Required: |
| 93 | |
| 94 | - fixed-link : "fixed-link" node, defined in "fixed-link.txt". |
| 95 | |
| 96 | Example: |
| 97 | ethernet@0,2 { |
| 98 | compatible = "fsl,enetc"; |
| 99 | reg = <0x000200 0 0 0 0>; |
| 100 | fixed-link { |
| 101 | speed = <1000>; |
| 102 | full-duplex; |
| 103 | }; |
| 104 | }; |
| 105 | |
| 106 | * Integrated Endpoint Register Block bindings |
| 107 | |
| 108 | Optionally, the fsl_enetc driver can probe on the Integrated Endpoint Register |
| 109 | Block, which preconfigures the FIFO limits for the ENETC ports. This is a node |
| 110 | with the following properties: |
| 111 | |
| 112 | - reg : Specifies the address in the SoC memory space. |
| 113 | - compatible : Must be "fsl,ls1028a-enetc-ierb". |
| 114 | |
| 115 | Example: |
| 116 | ierb@1f0800000 { |
| 117 | compatible = "fsl,ls1028a-enetc-ierb"; |
| 118 | reg = <0x01 0xf0800000 0x0 0x10000>; |
| 119 | }; |