| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/iio/imu/adi,adis16480.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Analog Devices ADIS16480 and similar IMUs |
| 8 | |
| 9 | maintainers: |
| 10 | - Alexandru Tachici <alexandru.tachici@analog.com> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | enum: |
| 15 | - adi,adis16375 |
| 16 | - adi,adis16480 |
| 17 | - adi,adis16485 |
| 18 | - adi,adis16488 |
| 19 | - adi,adis16490 |
| 20 | - adi,adis16495-1 |
| 21 | - adi,adis16495-2 |
| 22 | - adi,adis16495-3 |
| 23 | - adi,adis16497-1 |
| 24 | - adi,adis16497-2 |
| 25 | - adi,adis16497-3 |
| 26 | |
| 27 | reg: |
| 28 | maxItems: 1 |
| 29 | |
| 30 | interrupts: |
| 31 | minItems: 1 |
| 32 | maxItems: 2 |
| 33 | description: | |
| 34 | Accepted interrupt types are: |
| 35 | * IRQ_TYPE_EDGE_RISING |
| 36 | * IRQ_TYPE_EDGE_FALLING |
| 37 | |
| 38 | interrupt-names: |
| 39 | minItems: 1 |
| 40 | maxItems: 2 |
| 41 | description: |
| 42 | Default if not supplied is DIO1. |
| 43 | items: |
| 44 | enum: |
| 45 | - DIO1 |
| 46 | - DIO2 |
| 47 | - DIO3 |
| 48 | - DIO4 |
| 49 | |
| 50 | spi-cpha: true |
| 51 | spi-cpol: true |
| 52 | |
| 53 | reset-gpios: |
| 54 | maxItems: 1 |
| 55 | description: Connected to RESET pin which is active low. |
| 56 | |
| 57 | clocks: |
| 58 | maxItems: 1 |
| 59 | description: If not provided, then the internal clock is used. |
| 60 | |
| 61 | clock-names: |
| 62 | description: | |
| 63 | sync: In sync mode, the internal clock is disabled and the frequency |
| 64 | of the external clock signal establishes therate of data |
| 65 | collection and processing. See Fig 14 and 15 in the datasheet. |
| 66 | The clock-frequency must be: |
| 67 | * 3000 to 4500 Hz for adis1649x devices. |
| 68 | * 700 to 2400 Hz for adis1648x devices. |
| 69 | pps: In Pulse Per Second (PPS) Mode, the rate of data collection and |
| 70 | production is equal to the product of the external clock |
| 71 | frequency and the scale factor in the SYNC_SCALE register, see |
| 72 | Table 154 in the datasheet. |
| 73 | The clock-frequency must be: |
| 74 | * 1 to 128 Hz for adis1649x devices. |
| 75 | * This mode is not supported by adis1648x devices. |
| 76 | enum: |
| 77 | - sync |
| 78 | - pps |
| 79 | |
| 80 | adi,ext-clk-pin: |
| 81 | $ref: /schemas/types.yaml#/definitions/string |
| 82 | description: | |
| 83 | The DIOx line to be used as an external clock input. |
| 84 | Each DIOx pin supports only one function at a time (data ready line |
| 85 | selection or external clock input). When a single pin has two |
| 86 | two assignments, the enable bit for the lower priority function |
| 87 | automatically resets to zero (disabling the lower priority function). |
| 88 | Data ready has highest priority. |
| 89 | If not provided then DIO2 is assigned as default external clock |
| 90 | input pin. |
| 91 | enum: |
| 92 | - DIO1 |
| 93 | - DIO2 |
| 94 | - DIO3 |
| 95 | - DIO4 |
| 96 | |
| 97 | required: |
| 98 | - compatible |
| 99 | - reg |
| 100 | - interrupts |
| 101 | - spi-cpha |
| 102 | - spi-cpol |
| 103 | - spi-max-frequency |
| 104 | |
| 105 | allOf: |
| 106 | - $ref: /schemas/spi/spi-peripheral-props.yaml# |
| 107 | |
| 108 | unevaluatedProperties: false |
| 109 | |
| 110 | examples: |
| 111 | - | |
| 112 | #include <dt-bindings/interrupt-controller/irq.h> |
| 113 | spi { |
| 114 | #address-cells = <1>; |
| 115 | #size-cells = <0>; |
| 116 | |
| 117 | imu@0 { |
| 118 | compatible = "adi,adis16495-1"; |
| 119 | reg = <0>; |
| 120 | spi-max-frequency = <3200000>; |
| 121 | spi-cpol; |
| 122 | spi-cpha; |
| 123 | interrupts = <25 IRQ_TYPE_EDGE_FALLING>; |
| 124 | interrupt-parent = <&gpio>; |
| 125 | interrupt-names = "DIO2"; |
| 126 | clocks = <&adis16495_sync>; |
| 127 | clock-names = "sync"; |
| 128 | adi,ext-clk-pin = "DIO1"; |
| 129 | }; |
| 130 | }; |
| 131 | ... |