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git01.mediatek.com / filogic / uboot / 762f85bb2e36762ee4d7395002b8181905aec690 / . / Bindings / i2c / qcom,i2c-cci.yaml
blob: daf4e71b8e7f9326fff477e36e0d56672a9e8cdb [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Control Interface (CCI) I2C controller
8
9maintainers:
10 - Loic Poulain <loic.poulain@linaro.org>
11 - Robert Foss <robert.foss@linaro.org>
12
13properties:
14 compatible:
15 oneOf:
16 - enum:
17 - qcom,msm8226-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
20
21 - items:
22 - enum:
23 - qcom,msm8916-cci
24 - const: qcom,msm8226-cci # CCI v1
25
26 - items:
27 - enum:
28 - qcom,sc7280-cci
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame^]29 - qcom,sc8280xp-cci
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]30 - qcom,sdm845-cci
31 - qcom,sm6350-cci
32 - qcom,sm8250-cci
33 - qcom,sm8450-cci
34 - const: qcom,msm8996-cci # CCI v2
35
36 "#address-cells":
37 const: 1
38
39 "#size-cells":
40 const: 0
41
42 clocks:
43 minItems: 3
44 maxItems: 6
45
46 clock-names:
47 minItems: 3
48 maxItems: 6
49
50 interrupts:
51 maxItems: 1
52
53 power-domains:
54 maxItems: 1
55
56 reg:
57 maxItems: 1
58
59patternProperties:
60 "^i2c-bus@[01]$":
61 $ref: /schemas/i2c/i2c-controller.yaml#
62 unevaluatedProperties: false
63
64 properties:
65 reg:
66 maxItems: 1
67
68 clock-frequency:
69 default: 100000
70
71required:
72 - compatible
73 - clock-names
74 - clocks
75 - interrupts
76 - reg
77
78allOf:
79 - if:
80 properties:
81 compatible:
82 contains:
83 enum:
84 - qcom,msm8996-cci
85 then:
86 required:
87 - power-domains
88
89 - if:
90 properties:
91 compatible:
92 contains:
93 enum:
94 - qcom,msm8226-cci
95 - qcom,msm8916-cci
96 then:
97 properties:
98 i2c-bus@1: false
99
100 - if:
101 properties:
102 compatible:
103 oneOf:
104 - contains:
105 enum:
106 - qcom,msm8974-cci
107
108 - const: qcom,msm8226-cci
109 then:
110 properties:
111 clocks:
112 maxItems: 3
113 clock-names:
114 items:
115 - const: camss_top_ahb
116 - const: cci_ahb
117 - const: cci
118
119 - if:
120 properties:
121 compatible:
122 oneOf:
123 - contains:
124 enum:
125 - qcom,msm8916-cci
126
127 - const: qcom,msm8996-cci
128 then:
129 properties:
130 clocks:
131 maxItems: 4
132 clock-names:
133 items:
134 - const: camss_top_ahb
135 - const: cci_ahb
136 - const: cci
137 - const: camss_ahb
138
139 - if:
140 properties:
141 compatible:
142 contains:
143 enum:
144 - qcom,sdm845-cci
145 - qcom,sm6350-cci
146 then:
147 properties:
148 clocks:
149 minItems: 6
150 clock-names:
151 items:
152 - const: camnoc_axi
153 - const: soc_ahb
154 - const: slow_ahb_src
155 - const: cpas_ahb
156 - const: cci
157 - const: cci_src
158
159 - if:
160 properties:
161 compatible:
162 contains:
163 enum:
164 - qcom,sc7280-cci
165 - qcom,sm8250-cci
166 - qcom,sm8450-cci
167 then:
168 properties:
169 clocks:
170 minItems: 5
171 maxItems: 5
172 clock-names:
173 items:
174 - const: camnoc_axi
175 - const: slow_ahb_src
176 - const: cpas_ahb
177 - const: cci
178 - const: cci_src
179
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame^]180 - if:
181 properties:
182 compatible:
183 contains:
184 enum:
185 - qcom,sc8280xp-cci
186 then:
187 properties:
188 clocks:
189 minItems: 4
190 maxItems: 4
191 clock-names:
192 items:
193 - const: camnoc_axi
194 - const: slow_ahb_src
195 - const: cpas_ahb
196 - const: cci
197
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]198additionalProperties: false
199
200examples:
201 - |
202 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
203 #include <dt-bindings/gpio/gpio.h>
204 #include <dt-bindings/interrupt-controller/arm-gic.h>
205
206 cci@ac4a000 {
207 reg = <0x0ac4a000 0x4000>;
208 compatible = "qcom,sdm845-cci", "qcom,msm8996-cci";
209 #address-cells = <1>;
210 #size-cells = <0>;
211
212 interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
213 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
214
215 clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
216 <&clock_camcc CAM_CC_SOC_AHB_CLK>,
217 <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
218 <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
219 <&clock_camcc CAM_CC_CCI_CLK>,
220 <&clock_camcc CAM_CC_CCI_CLK_SRC>;
221 clock-names = "camnoc_axi",
222 "soc_ahb",
223 "slow_ahb_src",
224 "cpas_ahb",
225 "cci",
226 "cci_src";
227
228 assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
229 <&clock_camcc CAM_CC_CCI_CLK>;
230 assigned-clock-rates = <80000000>,
231 <37500000>;
232
233 pinctrl-names = "default", "sleep";
234 pinctrl-0 = <&cci0_default &cci1_default>;
235 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
236
237 i2c-bus@0 {
238 reg = <0>;
239 clock-frequency = <1000000>;
240 #address-cells = <1>;
241 #size-cells = <0>;
242
243 camera@10 {
244 compatible = "ovti,ov8856";
245 reg = <0x10>;
246
247 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&cam0_default>;
250
251 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
252 clock-names = "xvclk";
253 clock-frequency = <19200000>;
254
255 dovdd-supply = <&vreg_lvs1a_1p8>;
256 avdd-supply = <&cam0_avdd_2v8>;
257 dvdd-supply = <&cam0_dvdd_1v2>;
258
259 port {
260 ov8856_ep: endpoint {
261 link-frequencies = /bits/ 64 <360000000 180000000>;
262 data-lanes = <1 2 3 4>;
263 remote-endpoint = <&csiphy0_ep>;
264 };
265 };
266 };
267 };
268
269 cci_i2c1: i2c-bus@1 {
270 reg = <1>;
271 clock-frequency = <1000000>;
272 #address-cells = <1>;
273 #size-cells = <0>;
274
275 camera@60 {
276 compatible = "ovti,ov7251";
277 reg = <0x60>;
278
279 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&cam3_default>;
282
283 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
284 clock-names = "xclk";
285 clock-frequency = <24000000>;
286
287 vdddo-supply = <&vreg_lvs1a_1p8>;
288 vdda-supply = <&cam3_avdd_2v8>;
289
290 port {
291 ov7251_ep: endpoint {
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]292 data-lanes = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]293 link-frequencies = /bits/ 64 <240000000 319200000>;
294 remote-endpoint = <&csiphy3_ep>;
295 };
296 };
297 };
298 };
299 };