blob: 4b3a46c8cbfdcd178bb7b15bad240d130d90c4d7 [file] [log] [blame]
Peter Tyserf3c970c2008-12-23 16:32:00 -06001/*
2 * Copyright 2008 Extreme Engineering Solutions, Inc.
3 * Copyright 2004, 2007 Freescale Semiconductor, Inc.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Peter Tyserf3c970c2008-12-23 16:32:00 -06006 */
7
8#include <common.h>
9#include <command.h>
10#include <pci.h>
11#include <asm/processor.h>
12#include <asm/immap_85xx.h>
Kumar Gala9bbd6432009-04-02 13:22:48 -050013#include <asm/fsl_pci.h>
Peter Tyserf3c970c2008-12-23 16:32:00 -060014#include <asm/io.h>
15#include <asm/cache.h>
16#include <asm/mmu.h>
Masahiro Yamada75f82d02018-03-05 01:20:11 +090017#include <linux/libfdt.h>
Peter Tyserf3c970c2008-12-23 16:32:00 -060018#include <fdt_support.h>
19#include <pca953x.h>
20
21extern void ft_board_pci_setup(void *blob, bd_t *bd);
22
Peter Tyserf3c970c2008-12-23 16:32:00 -060023static void flash_cs_fixup(void)
24{
Peter Tyserf3c970c2008-12-23 16:32:00 -060025 int flash_sel;
26
27 /*
28 * Print boot dev and swap flash flash chip selects if booted from 2nd
29 * flash. Swapping chip selects presents user with a common memory
30 * map regardless of which flash was booted from.
31 */
32 flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) &
33 CONFIG_SYS_PCA953X_FLASH_PASS_CS));
Peter Tyser0b5a2632010-12-28 18:12:05 -060034 printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1);
Peter Tyserf3c970c2008-12-23 16:32:00 -060035
36 if (flash_sel) {
Becky Bruce0d4cee12010-06-17 11:37:20 -050037 set_lbc_br(0, CONFIG_SYS_BR1_PRELIM);
38 set_lbc_or(0, CONFIG_SYS_OR1_PRELIM);
Peter Tyserf3c970c2008-12-23 16:32:00 -060039
Becky Bruce0d4cee12010-06-17 11:37:20 -050040 set_lbc_br(1, CONFIG_SYS_BR0_PRELIM);
41 set_lbc_or(1, CONFIG_SYS_OR0_PRELIM);
Peter Tyserf3c970c2008-12-23 16:32:00 -060042 }
43}
44
45int board_early_init_r(void)
46{
47 /* Initialize PCA9557 devices */
48 pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0);
49 pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0);
50
51 /*
52 * Remap NOR flash region to caching-inhibited
53 * so that flash can be erased/programmed properly.
54 */
55
56 /* Flush d-cache and invalidate i-cache of any FLASH data */
57 flush_dcache();
58 invalidate_icache();
59
60 /* Invalidate existing TLB entry for NOR flash */
61 disable_tlb(0);
62 set_tlb(1, (CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
63 (CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
64 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
65 0, 0, BOOKE_PAGESZ_256M, 1);
66
67 flash_cs_fixup();
68
69 return 0;
70}
71
72#if defined(CONFIG_OF_BOARD_SETUP)
Simon Glass2aec3cc2014-10-23 18:58:47 -060073int ft_board_setup(void *blob, bd_t *bd)
Peter Tyserf3c970c2008-12-23 16:32:00 -060074{
75#ifdef CONFIG_PCI
76 ft_board_pci_setup(blob, bd);
77#endif
78 ft_cpu_setup(blob, bd);
Simon Glass2aec3cc2014-10-23 18:58:47 -060079
80 return 0;
Peter Tyserf3c970c2008-12-23 16:32:00 -060081}
82#endif