Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Jorge Ramirez-Ortiz | 9f2d1b2 | 2018-01-10 11:33:50 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Board init file for Dragonboard 820C |
| 4 | * |
Jorge Ramirez-Ortiz | c8833d3 | 2018-01-10 11:33:52 +0100 | [diff] [blame] | 5 | * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> |
Jorge Ramirez-Ortiz | 9f2d1b2 | 2018-01-10 11:33:50 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
Simon Glass | afb0215 | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 8 | #include <cpu_func.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 9 | #include <init.h> |
Jorge Ramirez-Ortiz | 9f2d1b2 | 2018-01-10 11:33:50 +0100 | [diff] [blame] | 10 | #include <asm/arch/sysmap-apq8096.h> |
Simon Glass | 5e6201b | 2019-08-01 09:46:51 -0600 | [diff] [blame] | 11 | #include <env.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 12 | #include <asm/cache.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 13 | #include <asm/global_data.h> |
Jorge Ramirez-Ortiz | 9f2d1b2 | 2018-01-10 11:33:50 +0100 | [diff] [blame] | 14 | #include <linux/arm-smccc.h> |
| 15 | #include <linux/psci.h> |
| 16 | #include <common.h> |
| 17 | #include <dm.h> |
| 18 | #include <asm/io.h> |
| 19 | #include <linux/bitops.h> |
| 20 | #include <asm/psci.h> |
Jorge Ramirez-Ortiz | c8833d3 | 2018-01-10 11:33:52 +0100 | [diff] [blame] | 21 | #include <asm/gpio.h> |
Jorge Ramirez-Ortiz | 9f2d1b2 | 2018-01-10 11:33:50 +0100 | [diff] [blame] | 22 | |
| 23 | DECLARE_GLOBAL_DATA_PTR; |
| 24 | |
| 25 | int dram_init(void) |
| 26 | { |
| 27 | gd->ram_size = PHYS_SDRAM_SIZE; |
| 28 | |
| 29 | return 0; |
| 30 | } |
| 31 | |
| 32 | int dram_init_banksize(void) |
| 33 | { |
| 34 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 35 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
| 36 | |
| 37 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
| 38 | gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; |
| 39 | |
| 40 | return 0; |
| 41 | } |
| 42 | |
| 43 | static void sdhci_power_init(void) |
| 44 | { |
| 45 | const u32 TLMM_PULL_MASK = 0x3; |
| 46 | const u32 TLMM_HDRV_MASK = 0x7; |
| 47 | |
| 48 | struct tlmm_cfg { |
| 49 | u32 bit; /* bit in the register */ |
| 50 | u8 mask; /* mask clk/dat/cmd control */ |
| 51 | u8 val; |
| 52 | }; |
| 53 | |
| 54 | /* bit offsets in the sdc tlmm register */ |
| 55 | enum { SDC1_DATA_HDRV = 0, |
| 56 | SDC1_CMD_HDRV = 3, |
| 57 | SDC1_CLK_HDRV = 6, |
| 58 | SDC1_DATA_PULL = 9, |
| 59 | SDC1_CMD_PULL = 11, |
| 60 | SDC1_CLK_PULL = 13, |
| 61 | SDC1_RCLK_PULL = 15, |
| 62 | }; |
| 63 | |
| 64 | enum { TLMM_PULL_DOWN = 0x1, |
| 65 | TLMM_PULL_UP = 0x3, |
| 66 | TLMM_NO_PULL = 0x0, |
| 67 | }; |
| 68 | |
| 69 | enum { TLMM_CUR_VAL_10MA = 0x04, |
| 70 | TLMM_CUR_VAL_16MA = 0x07, |
| 71 | }; |
| 72 | int i; |
| 73 | |
| 74 | /* drive strength configs for sdhc pins */ |
| 75 | const struct tlmm_cfg hdrv[] = { |
| 76 | |
| 77 | { SDC1_CLK_HDRV, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, }, |
| 78 | { SDC1_CMD_HDRV, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, }, |
| 79 | { SDC1_DATA_HDRV, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, }, |
| 80 | }; |
| 81 | |
| 82 | /* pull configs for sdhc pins */ |
| 83 | const struct tlmm_cfg pull[] = { |
| 84 | |
| 85 | { SDC1_CLK_PULL, TLMM_NO_PULL, TLMM_PULL_MASK, }, |
| 86 | { SDC1_CMD_PULL, TLMM_PULL_UP, TLMM_PULL_MASK, }, |
| 87 | { SDC1_DATA_PULL, TLMM_PULL_UP, TLMM_PULL_MASK, }, |
| 88 | }; |
| 89 | |
| 90 | const struct tlmm_cfg rclk[] = { |
| 91 | |
| 92 | { SDC1_RCLK_PULL, TLMM_PULL_DOWN, TLMM_PULL_MASK,}, |
| 93 | }; |
| 94 | |
| 95 | for (i = 0; i < ARRAY_SIZE(hdrv); i++) |
| 96 | clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG, |
| 97 | hdrv[i].mask << hdrv[i].bit, |
| 98 | hdrv[i].val << hdrv[i].bit); |
| 99 | |
| 100 | for (i = 0; i < ARRAY_SIZE(pull); i++) |
| 101 | clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG, |
| 102 | pull[i].mask << pull[i].bit, |
| 103 | pull[i].val << pull[i].bit); |
| 104 | |
| 105 | for (i = 0; i < ARRAY_SIZE(rclk); i++) |
| 106 | clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG, |
| 107 | rclk[i].mask << rclk[i].bit, |
| 108 | rclk[i].val << rclk[i].bit); |
| 109 | } |
| 110 | |
| 111 | static void show_psci_version(void) |
| 112 | { |
| 113 | struct arm_smccc_res res; |
| 114 | |
| 115 | arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); |
| 116 | |
| 117 | printf("PSCI: v%ld.%ld\n", |
| 118 | PSCI_VERSION_MAJOR(res.a0), |
| 119 | PSCI_VERSION_MINOR(res.a0)); |
| 120 | } |
| 121 | |
| 122 | int board_init(void) |
| 123 | { |
| 124 | sdhci_power_init(); |
| 125 | show_psci_version(); |
| 126 | |
| 127 | return 0; |
| 128 | } |
| 129 | |
Harald Seiler | 6f14d5f | 2020-12-15 16:47:52 +0100 | [diff] [blame] | 130 | void reset_cpu(void) |
Jorge Ramirez-Ortiz | 9f2d1b2 | 2018-01-10 11:33:50 +0100 | [diff] [blame] | 131 | { |
| 132 | psci_system_reset(); |
Jorge Ramirez-Ortiz | c8833d3 | 2018-01-10 11:33:52 +0100 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | /* Check for vol- button - if pressed - stop autoboot */ |
| 136 | int misc_init_r(void) |
| 137 | { |
| 138 | struct udevice *pon; |
| 139 | struct gpio_desc resin; |
| 140 | int node, ret; |
| 141 | |
| 142 | ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8994_pon@800", &pon); |
| 143 | if (ret < 0) { |
| 144 | printf("Failed to find PMIC pon node. Check device tree\n"); |
| 145 | return 0; |
| 146 | } |
| 147 | |
| 148 | node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon), |
| 149 | "key_vol_down"); |
| 150 | if (node < 0) { |
| 151 | printf("Failed to find key_vol_down node. Check device tree\n"); |
| 152 | return 0; |
| 153 | } |
| 154 | |
| 155 | if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0, |
| 156 | &resin, 0)) { |
| 157 | printf("Failed to request key_vol_down button.\n"); |
| 158 | return 0; |
| 159 | } |
| 160 | |
| 161 | if (dm_gpio_get_value(&resin)) { |
| 162 | env_set("bootdelay", "-1"); |
| 163 | printf("Power button pressed - dropping to console.\n"); |
| 164 | } |
| 165 | |
| 166 | return 0; |
| 167 | } |