blob: 47a43649bbb068c85221e8ea73223709c07f6588 [file] [log] [blame]
Patrick Delaunaye063f892022-05-20 18:24:52 +02001// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
2/*
3 * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
4 */
5
6/ {
7 aliases {
8 gpio0 = &gpioa;
9 gpio1 = &gpiob;
10 gpio2 = &gpioc;
11 gpio3 = &gpiod;
12 gpio4 = &gpioe;
13 gpio5 = &gpiof;
14 gpio6 = &gpiog;
15 gpio7 = &gpioh;
16 gpio8 = &gpioi;
17 pinctrl0 = &pinctrl;
18 };
19
Patrick Delaunay75785d42022-09-07 13:42:23 +020020 firmware {
21 optee {
22 u-boot,dm-pre-reloc;
23 };
24 };
25
Patrick Delaunaye063f892022-05-20 18:24:52 +020026 /* need PSCI for sysreset during board_f */
27 psci {
28 u-boot,dm-pre-proper;
29 };
30
31 soc {
32 u-boot,dm-pre-reloc;
33
34 ddr: ddr@5a003000 {
35 u-boot,dm-pre-reloc;
36
37 compatible = "st,stm32mp13-ddr";
38
39 reg = <0x5A003000 0x550
40 0x5A004000 0x234>;
41
42 status = "okay";
43 };
44 };
45};
46
47&bsec {
48 u-boot,dm-pre-reloc;
49};
50
51&gpioa {
52 u-boot,dm-pre-reloc;
53};
54
55&gpiob {
56 u-boot,dm-pre-reloc;
57};
58
59&gpioc {
60 u-boot,dm-pre-reloc;
61};
62
63&gpiod {
64 u-boot,dm-pre-reloc;
65};
66
67&gpioe {
68 u-boot,dm-pre-reloc;
69};
70
71&gpiof {
72 u-boot,dm-pre-reloc;
73};
74
75&gpiog {
76 u-boot,dm-pre-reloc;
77};
78
79&gpioh {
80 u-boot,dm-pre-reloc;
81};
82
83&gpioi {
84 u-boot,dm-pre-reloc;
85};
86
87&iwdg2 {
88 u-boot,dm-pre-reloc;
89};
90
Patrick Delaunaye063f892022-05-20 18:24:52 +020091&pinctrl {
92 u-boot,dm-pre-reloc;
93};
94
Patrick Delaunayad09d082022-07-06 18:20:25 +020095&scmi {
96 u-boot,dm-pre-reloc;
97};
98
99&scmi_clk {
100 u-boot,dm-pre-reloc;
101};
102
103&scmi_reset {
104 u-boot,dm-pre-reloc;
105};
106
107&scmi_shm {
108 u-boot,dm-pre-reloc;
109};
110
111&scmi_sram {
112 u-boot,dm-pre-reloc;
113};
114
Patrick Delaunaye063f892022-05-20 18:24:52 +0200115&syscfg {
116 u-boot,dm-pre-reloc;
117};