Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | 7680550 | 2014-11-12 22:42:11 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2011 The Chromium OS Authors. |
| 4 | * (C) Copyright 2008,2009 |
| 5 | * Graeme Russ, <graeme.russ@gmail.com> |
| 6 | * |
| 7 | * (C) Copyright 2002 |
| 8 | * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> |
Simon Glass | 7680550 | 2014-11-12 22:42:11 -0700 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
Simon Glass | 4e03781 | 2015-03-05 12:25:31 -0700 | [diff] [blame] | 12 | #include <dm.h> |
Simon Glass | a54d981 | 2014-11-12 22:42:12 -0700 | [diff] [blame] | 13 | #include <errno.h> |
| 14 | #include <malloc.h> |
Simon Glass | 7680550 | 2014-11-12 22:42:11 -0700 | [diff] [blame] | 15 | #include <pci.h> |
Simon Glass | 4e03781 | 2015-03-05 12:25:31 -0700 | [diff] [blame] | 16 | #include <asm/io.h> |
Simon Glass | 7680550 | 2014-11-12 22:42:11 -0700 | [diff] [blame] | 17 | #include <asm/pci.h> |
| 18 | |
Simon Glass | 7567787 | 2019-09-25 08:11:37 -0600 | [diff] [blame^] | 19 | /* |
| 20 | * TODO(sjg@chromium.org): Drop the first parameter from each of these |
| 21 | * functions since it is not used. |
| 22 | */ |
Simon Glass | 4e03781 | 2015-03-05 12:25:31 -0700 | [diff] [blame] | 23 | int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, |
| 24 | ulong *valuep, enum pci_size_t size) |
| 25 | { |
| 26 | outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); |
| 27 | switch (size) { |
| 28 | case PCI_SIZE_8: |
| 29 | *valuep = inb(PCI_REG_DATA + (offset & 3)); |
| 30 | break; |
| 31 | case PCI_SIZE_16: |
| 32 | *valuep = inw(PCI_REG_DATA + (offset & 2)); |
| 33 | break; |
| 34 | case PCI_SIZE_32: |
| 35 | *valuep = inl(PCI_REG_DATA); |
| 36 | break; |
| 37 | } |
| 38 | |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, |
| 43 | ulong value, enum pci_size_t size) |
| 44 | { |
| 45 | outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); |
| 46 | switch (size) { |
| 47 | case PCI_SIZE_8: |
| 48 | outb(value, PCI_REG_DATA + (offset & 3)); |
| 49 | break; |
| 50 | case PCI_SIZE_16: |
| 51 | outw(value, PCI_REG_DATA + (offset & 2)); |
| 52 | break; |
| 53 | case PCI_SIZE_32: |
| 54 | outl(value, PCI_REG_DATA); |
| 55 | break; |
| 56 | } |
| 57 | |
| 58 | return 0; |
| 59 | } |
Bin Meng | 363849b | 2015-04-24 18:10:03 +0800 | [diff] [blame] | 60 | |
Simon Glass | 7567787 | 2019-09-25 08:11:37 -0600 | [diff] [blame^] | 61 | int pci_x86_clrset_config(struct udevice *bus, pci_dev_t bdf, uint offset, |
| 62 | ulong clr, ulong set, enum pci_size_t size) |
| 63 | { |
| 64 | ulong value; |
| 65 | int ret; |
| 66 | |
| 67 | ret = pci_x86_read_config(bus, bdf, offset, &value, size); |
| 68 | if (ret) |
| 69 | return ret; |
| 70 | value &= ~clr; |
| 71 | value |= set; |
| 72 | |
| 73 | return pci_x86_write_config(bus, bdf, offset, value, size); |
| 74 | } |
| 75 | |
Bin Meng | da5d463 | 2015-07-15 16:23:40 +0800 | [diff] [blame] | 76 | void pci_assign_irqs(int bus, int device, u8 irq[4]) |
Bin Meng | 363849b | 2015-04-24 18:10:03 +0800 | [diff] [blame] | 77 | { |
| 78 | pci_dev_t bdf; |
Bin Meng | da5d463 | 2015-07-15 16:23:40 +0800 | [diff] [blame] | 79 | int func; |
| 80 | u16 vendor; |
Bin Meng | 363849b | 2015-04-24 18:10:03 +0800 | [diff] [blame] | 81 | u8 pin, line; |
| 82 | |
Bin Meng | da5d463 | 2015-07-15 16:23:40 +0800 | [diff] [blame] | 83 | for (func = 0; func < 8; func++) { |
| 84 | bdf = PCI_BDF(bus, device, func); |
Bin Meng | 8df0181 | 2016-02-01 01:40:57 -0800 | [diff] [blame] | 85 | pci_read_config16(bdf, PCI_VENDOR_ID, &vendor); |
Bin Meng | da5d463 | 2015-07-15 16:23:40 +0800 | [diff] [blame] | 86 | if (vendor == 0xffff || vendor == 0x0000) |
| 87 | continue; |
Bin Meng | 363849b | 2015-04-24 18:10:03 +0800 | [diff] [blame] | 88 | |
Bin Meng | 8df0181 | 2016-02-01 01:40:57 -0800 | [diff] [blame] | 89 | pci_read_config8(bdf, PCI_INTERRUPT_PIN, &pin); |
Bin Meng | 363849b | 2015-04-24 18:10:03 +0800 | [diff] [blame] | 90 | |
Bin Meng | da5d463 | 2015-07-15 16:23:40 +0800 | [diff] [blame] | 91 | /* PCI spec says all values except 1..4 are reserved */ |
| 92 | if ((pin < 1) || (pin > 4)) |
| 93 | continue; |
Bin Meng | 363849b | 2015-04-24 18:10:03 +0800 | [diff] [blame] | 94 | |
Bin Meng | da5d463 | 2015-07-15 16:23:40 +0800 | [diff] [blame] | 95 | line = irq[pin - 1]; |
Bin Meng | e0a5fd9 | 2015-07-15 16:23:41 +0800 | [diff] [blame] | 96 | if (!line) |
| 97 | continue; |
Bin Meng | 363849b | 2015-04-24 18:10:03 +0800 | [diff] [blame] | 98 | |
Bin Meng | da5d463 | 2015-07-15 16:23:40 +0800 | [diff] [blame] | 99 | debug("Assigning IRQ %d to PCI device %d.%x.%d (INT%c)\n", |
| 100 | line, bus, device, func, 'A' + pin - 1); |
Bin Meng | 363849b | 2015-04-24 18:10:03 +0800 | [diff] [blame] | 101 | |
Bin Meng | 8df0181 | 2016-02-01 01:40:57 -0800 | [diff] [blame] | 102 | pci_write_config8(bdf, PCI_INTERRUPT_LINE, line); |
Bin Meng | da5d463 | 2015-07-15 16:23:40 +0800 | [diff] [blame] | 103 | } |
Bin Meng | 363849b | 2015-04-24 18:10:03 +0800 | [diff] [blame] | 104 | } |