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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChung Liew3cdc00a2008-08-11 13:41:49 +00002/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang8d8dac92012-03-26 21:49:08 +00006 * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
TsiChung Liew3cdc00a2008-08-11 13:41:49 +00007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChung Liew3cdc00a2008-08-11 13:41:49 +00008 */
9
10#include <common.h>
Simon Glass0ffd9db2019-12-28 10:45:06 -070011#include <init.h>
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000012#include <spi.h>
13#include <asm/immap.h>
Alison Wang8d8dac92012-03-26 21:49:08 +000014#include <asm/io.h>
Simon Glassdbd79542020-05-10 11:40:11 -060015#include <linux/delay.h>
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000016
17DECLARE_GLOBAL_DATA_PTR;
18
19int checkboard(void)
20{
21 /*
22 * need to to:
23 * Check serial flash size. if 2mb evb, else 8mb demo
24 */
25 puts("Board: ");
26 puts("Freescale M54451 EVB\n");
27 return 0;
28};
29
Simon Glassd35f3382017-04-06 12:47:05 -060030int dram_init(void)
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000031{
32 u32 dramsize;
33#ifdef CONFIG_CF_SBF
34 /*
35 * Serial Boot: The dram is already initialized in start.S
36 * only require to return DRAM size
37 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020038 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000039#else
Alison Wang8d8dac92012-03-26 21:49:08 +000040 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
41 gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000042 u32 i;
43
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020044 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000045
Alison Wang8d8dac92012-03-26 21:49:08 +000046 if ((in_be32(&sdram->sdcfg1) == CONFIG_SYS_SDRAM_CFG1) &&
47 (in_be32(&sdram->sdcfg2) == CONFIG_SYS_SDRAM_CFG2))
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000048 return dramsize;
49
50 for (i = 0x13; i < 0x20; i++) {
51 if (dramsize == (1 << i))
52 break;
53 }
54 i--;
55
Alison Wang8d8dac92012-03-26 21:49:08 +000056 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000057
Alison Wang8d8dac92012-03-26 21:49:08 +000058 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000059
Alison Wang8d8dac92012-03-26 21:49:08 +000060 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
61 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000062
63 udelay(200);
64
65 /* Issue PALL */
Alison Wang8d8dac92012-03-26 21:49:08 +000066 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000067 __asm__("nop");
68
69 /* Perform two refresh cycles */
Alison Wang8d8dac92012-03-26 21:49:08 +000070 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000071 __asm__("nop");
Alison Wang8d8dac92012-03-26 21:49:08 +000072 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000073 __asm__("nop");
74
75 /* Issue LEMR */
Alison Wang8d8dac92012-03-26 21:49:08 +000076 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000077 __asm__("nop");
Alison Wang8d8dac92012-03-26 21:49:08 +000078 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000079 __asm__("nop");
80
Alison Wang8d8dac92012-03-26 21:49:08 +000081 out_be32(&sdram->sdcr,
82 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000000);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000083
84 udelay(100);
85#endif
Simon Glass39f90ba2017-03-31 08:40:25 -060086 gd->ram_size = dramsize;
87
88 return 0;
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000089};
90
91int testdram(void)
92{
93 /* TODO: XXX XXX XXX */
94 printf("DRAM test not implemented!\n");
95
96 return (0);
97}