| Stephen Warren | a58ff32 | 2016-07-29 13:15:02 -0600 | [diff] [blame] | 1 | NVIDIA Tegra186 BPMP I2C controller |
| 2 | |
| 3 | In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW |
| 4 | devices, such as the I2C controller for the power management I2C bus. Software |
| 5 | running on other CPUs must perform IPC to the BPMP in order to execute |
| 6 | transactions on that I2C bus. This binding describes an I2C bus that is |
| 7 | accessed in such a fashion. |
| 8 | |
| 9 | The BPMP I2C node must be located directly inside the main BPMP node. See |
| 10 | ../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding. |
| 11 | |
| 12 | This node represents an I2C controller. See ../i2c/i2c.txt for details of the |
| 13 | core I2C binding. |
| 14 | |
| 15 | Required properties: |
| 16 | - compatible: |
| 17 | Array of strings. |
| 18 | One of: |
| 19 | - "nvidia,tegra186-bpmp-i2c". |
| 20 | - #address-cells: Address cells for I2C device address. |
| 21 | Single-cell integer. |
| 22 | Must be <1>. |
| 23 | - #size-cells: |
| 24 | Single-cell integer. |
| 25 | Must be <0>. |
| 26 | - nvidia,bpmp-bus-id: |
| 27 | Single-cell integer. |
| 28 | Indicates the I2C bus number this DT node represent, as defined by the |
| 29 | BPMP firmware. |
| 30 | |
| 31 | Example: |
| 32 | |
| 33 | bpmp { |
| 34 | ... |
| 35 | |
| 36 | i2c { |
| 37 | compatible = "nvidia,tegra186-bpmp-i2c"; |
| 38 | #address-cells = <1>; |
| 39 | #size-cells = <0>; |
| 40 | nvidia,bpmp-bus-id = <5>; |
| 41 | }; |
| 42 | }; |