blob: fd5dd229b58150ceae1847891760fbe93943ed13 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass509805b2015-01-27 22:13:39 -07002/*
3 * Copyright (C) 2015, Google, Inc
4 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
Simon Glass509805b2015-01-27 22:13:39 -07005 */
6
7#include <common.h>
Simon Glass828b7252017-07-30 19:24:01 -07008#include <dm.h>
Simon Glass509805b2015-01-27 22:13:39 -07009#include <errno.h>
Simon Glass5eb66392020-07-07 21:32:12 -060010#include <log.h>
Simon Glass509805b2015-01-27 22:13:39 -070011#include <malloc.h>
Simon Glass828b7252017-07-30 19:24:01 -070012#include <mapmem.h>
Simon Glass74aaa3f2021-01-13 20:29:54 -070013#include <mmc.h>
Simon Glass509805b2015-01-27 22:13:39 -070014#include <sdhci.h>
Simon Glass5eb66392020-07-07 21:32:12 -060015#include <acpi/acpigen.h>
16#include <acpi/acpi_device.h>
17#include <acpi/acpi_dp.h>
18#include <asm-generic/gpio.h>
19#include <dm/acpi.h>
Simon Glass509805b2015-01-27 22:13:39 -070020
Simon Glass5c9c49e2021-01-13 20:29:52 -070021/* Type of MMC device */
22enum {
23 TYPE_SD,
24 TYPE_EMMC,
25};
26
Simon Glass828b7252017-07-30 19:24:01 -070027struct pci_mmc_plat {
28 struct mmc_config cfg;
29 struct mmc mmc;
30};
31
32struct pci_mmc_priv {
33 struct sdhci_host host;
34 void *base;
Simon Glass5eb66392020-07-07 21:32:12 -060035 struct gpio_desc cd_gpio;
Simon Glass828b7252017-07-30 19:24:01 -070036};
37
38static int pci_mmc_probe(struct udevice *dev)
Simon Glass509805b2015-01-27 22:13:39 -070039{
Simon Glass828b7252017-07-30 19:24:01 -070040 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
Simon Glassfa20e932020-12-03 16:55:20 -070041 struct pci_mmc_plat *plat = dev_get_plat(dev);
Simon Glass828b7252017-07-30 19:24:01 -070042 struct pci_mmc_priv *priv = dev_get_priv(dev);
43 struct sdhci_host *host = &priv->host;
Simon Glass74aaa3f2021-01-13 20:29:54 -070044 struct blk_desc *desc;
Simon Glass509805b2015-01-27 22:13:39 -070045 int ret;
Simon Glass509805b2015-01-27 22:13:39 -070046
Simon Glass74aaa3f2021-01-13 20:29:54 -070047 ret = mmc_of_parse(dev, &plat->cfg);
48 if (ret)
49 return ret;
50 desc = mmc_get_blk_desc(&plat->mmc);
51 desc->removable = !(plat->cfg.host_caps & MMC_CAP_NONREMOVABLE);
52
Bernhard Messerklingerda5cfec2018-02-15 09:09:43 +010053 host->ioaddr = (void *)dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0,
54 PCI_REGION_MEM);
Simon Glass828b7252017-07-30 19:24:01 -070055 host->name = dev->name;
Peng Fan798f2e82019-08-06 02:47:56 +000056 host->mmc = &plat->mmc;
57 host->mmc->dev = dev;
Simon Glass828b7252017-07-30 19:24:01 -070058 ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
59 if (ret)
60 return ret;
Simon Glass828b7252017-07-30 19:24:01 -070061 host->mmc->priv = &priv->host;
Simon Glass828b7252017-07-30 19:24:01 -070062 upriv->mmc = host->mmc;
Simon Glass509805b2015-01-27 22:13:39 -070063
Simon Glass828b7252017-07-30 19:24:01 -070064 return sdhci_probe(dev);
65}
Simon Glass509805b2015-01-27 22:13:39 -070066
Simon Glassaad29ae2020-12-03 16:55:21 -070067static int pci_mmc_of_to_plat(struct udevice *dev)
Simon Glass5eb66392020-07-07 21:32:12 -060068{
Harm Berntsen6ca79a22020-11-06 12:20:44 +000069 if (CONFIG_IS_ENABLED(DM_GPIO)) {
70 struct pci_mmc_priv *priv = dev_get_priv(dev);
Simon Glass5eb66392020-07-07 21:32:12 -060071
Harm Berntsen6ca79a22020-11-06 12:20:44 +000072 gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
73 }
Simon Glass5eb66392020-07-07 21:32:12 -060074
75 return 0;
76}
77
Simon Glass828b7252017-07-30 19:24:01 -070078static int pci_mmc_bind(struct udevice *dev)
79{
Simon Glassfa20e932020-12-03 16:55:20 -070080 struct pci_mmc_plat *plat = dev_get_plat(dev);
Simon Glass509805b2015-01-27 22:13:39 -070081
Simon Glass828b7252017-07-30 19:24:01 -070082 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
Simon Glass509805b2015-01-27 22:13:39 -070083}
Simon Glass828b7252017-07-30 19:24:01 -070084
Simon Glass5eb66392020-07-07 21:32:12 -060085static int pci_mmc_acpi_fill_ssdt(const struct udevice *dev,
86 struct acpi_ctx *ctx)
87{
88 struct pci_mmc_priv *priv = dev_get_priv(dev);
89 char path[ACPI_PATH_MAX];
90 struct acpi_gpio gpio;
91 struct acpi_dp *dp;
92 int ret;
93
Simon Glassf1d50f72020-12-19 10:40:13 -070094 if (!dev_has_ofnode(dev))
Simon Glass5eb66392020-07-07 21:32:12 -060095 return 0;
Simon Glass5c9c49e2021-01-13 20:29:52 -070096 if (dev_get_driver_data(dev) == TYPE_EMMC)
97 return 0;
Simon Glass5eb66392020-07-07 21:32:12 -060098
99 ret = gpio_get_acpi(&priv->cd_gpio, &gpio);
100 if (ret)
101 return log_msg_ret("gpio", ret);
102 gpio.type = ACPI_GPIO_TYPE_INTERRUPT;
103 gpio.pull = ACPI_GPIO_PULL_NONE;
104 gpio.irq.mode = ACPI_IRQ_EDGE_TRIGGERED;
105 gpio.irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
106 gpio.irq.shared = ACPI_IRQ_SHARED;
107 gpio.irq.wake = ACPI_IRQ_WAKE;
108 gpio.interrupt_debounce_timeout = 10000; /* 100ms */
109
110 /* Use device path as the Scope for the SSDT */
111 ret = acpi_device_path(dev, path, sizeof(path));
112 if (ret)
113 return log_msg_ret("path", ret);
114 acpigen_write_scope(ctx, path);
115 acpigen_write_name(ctx, "_CRS");
116
117 /* Write GpioInt() as default (if set) or custom from devicetree */
118 acpigen_write_resourcetemplate_header(ctx);
119 acpi_device_write_gpio(ctx, &gpio);
120 acpigen_write_resourcetemplate_footer(ctx);
121
122 /* Bind the cd-gpio name to the GpioInt() resource */
123 dp = acpi_dp_new_table("_DSD");
124 if (!dp)
125 return -ENOMEM;
126 acpi_dp_add_gpio(dp, "cd-gpio", path, 0, 0, 1);
127 ret = acpi_dp_write(ctx, dp);
128 if (ret)
129 return log_msg_ret("cd", ret);
130
131 acpigen_pop_len(ctx);
132
133 return 0;
134}
135
136struct acpi_ops pci_mmc_acpi_ops = {
137 .fill_ssdt = pci_mmc_acpi_fill_ssdt,
138};
139
140static const struct udevice_id pci_mmc_match[] = {
Simon Glass5c9c49e2021-01-13 20:29:52 -0700141 { .compatible = "intel,apl-sd", .data = TYPE_SD },
142 { .compatible = "intel,apl-emmc", .data = TYPE_EMMC },
Simon Glass5eb66392020-07-07 21:32:12 -0600143 { }
144};
145
Simon Glass828b7252017-07-30 19:24:01 -0700146U_BOOT_DRIVER(pci_mmc) = {
147 .name = "pci_mmc",
148 .id = UCLASS_MMC,
Simon Glass5eb66392020-07-07 21:32:12 -0600149 .of_match = pci_mmc_match,
Simon Glass828b7252017-07-30 19:24:01 -0700150 .bind = pci_mmc_bind,
Simon Glassaad29ae2020-12-03 16:55:21 -0700151 .of_to_plat = pci_mmc_of_to_plat,
Simon Glass828b7252017-07-30 19:24:01 -0700152 .probe = pci_mmc_probe,
153 .ops = &sdhci_ops,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700154 .priv_auto = sizeof(struct pci_mmc_priv),
Simon Glass71fa5b42020-12-03 16:55:18 -0700155 .plat_auto = sizeof(struct pci_mmc_plat),
Simon Glass5eb66392020-07-07 21:32:12 -0600156 ACPI_OPS_PTR(&pci_mmc_acpi_ops)
Simon Glass828b7252017-07-30 19:24:01 -0700157};
158
159static struct pci_device_id mmc_supported[] = {
Bin Meng77520f82017-08-09 00:21:00 -0700160 { PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDHCI << 8, 0xffff00) },
Simon Glass828b7252017-07-30 19:24:01 -0700161 {},
162};
163
164U_BOOT_PCI_DEVICE(pci_mmc, mmc_supported);