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git01.mediatek.com / filogic / uboot / 74758a94ac46c470b1d0790d667946bb5b9db06d / . / include / configs / db-88f6820-gp.h
blob: 26c2240dbec133fba516bc73189a35b589c610b4 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]2/*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]4 */
5
6#ifndef _CONFIG_DB_88F6820_GP_H
7#define _CONFIG_DB_88F6820_GP_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]12
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]13#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
14
15/*
16 * Commands configuration
17 */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]18
19/* I2C */
20#define CONFIG_SYS_I2C
21#define CONFIG_SYS_I2C_MVTWSI
22#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
23#define CONFIG_SYS_I2C_SLAVE 0x0
24#define CONFIG_SYS_I2C_SPEED 100000
25
Konstantin Porotchkinc6cb8b72018-08-29 16:34:53 +0300[diff] [blame]26/*
Stefan Roese1746e872015-06-29 14:58:11 +0200[diff] [blame]27 * SDIO/MMC Card Configuration
28 */
Stefan Roese1746e872015-06-29 14:58:11 +0200[diff] [blame]29#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
30
Stefan Roese10aad202015-06-29 14:58:14 +0200[diff] [blame]31/*
32 * SATA/SCSI/AHCI configuration
33 */
Stefan Roese10aad202015-06-29 14:58:14 +0200[diff] [blame]34#define CONFIG_SCSI_AHCI_PLAT
35#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
36#define CONFIG_SYS_SCSI_MAX_LUN 1
37#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
38 CONFIG_SYS_SCSI_MAX_LUN)
39
Stefan Roese2feb2262015-06-29 14:58:16 +0200[diff] [blame]40/* USB/EHCI configuration */
Stefan Roese2feb2262015-06-29 14:58:16 +0200[diff] [blame]41#define CONFIG_EHCI_IS_TDI
42
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]43/* Environment in SPI NOR flash */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]44
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]45#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
46
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]47/* PCIe support */
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]48#ifndef CONFIG_SPL_BUILD
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]49#define CONFIG_PCI_SCAN_SHOW
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]50#endif
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]51
Kevin Smith2366bcc2015-05-18 16:09:46 +0000[diff] [blame]52/* Keep device tree and initrd in lower memory so the kernel can access them */
53#define CONFIG_EXTRA_ENV_SETTINGS \
54 "fdt_high=0x10000000\0" \
55 "initrd_high=0x10000000\0"
56
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]57/* SPL */
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]58/*
59 * Select the boot device here
60 *
61 * Currently supported are:
62 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
63 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
64 */
65#define SPL_BOOT_SPI_NOR_FLASH 1
66#define SPL_BOOT_SDIO_MMC_CARD 2
67#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
68
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]69/* Defines for SPL */
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]70#define CONFIG_SPL_SIZE (140 << 10)
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]71#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
72
73#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
74#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
75
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]76#ifdef CONFIG_SPL_BUILD
77#define CONFIG_SYS_MALLOC_SIMPLE
78#endif
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]79
80#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
81#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
82
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]83#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]84/* SPL related SPI defines */
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]85#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
86#endif
87
88#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
89/* SPL related MMC defines */
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]90#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
91#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]92#ifdef CONFIG_SPL_BUILD
93#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
94#endif
95#endif
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]96
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]97/*
98 * mv-common.h should be defined after CMD configs since it used them
99 * to enable certain macros
100 */
101#include "mv-common.h"
102
103#endif /* _CONFIG_DB_88F6820_GP_H */