Luca Ceresoli | 860e2a7 | 2011-04-20 11:02:08 -0400 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2011 Comelit Group SpA |
| 3 | * Luca Ceresoli <luca.ceresoli@comelit.it> |
| 4 | * |
| 5 | * Based on board/ti/beagle/beagle.c: |
| 6 | * (C) Copyright 2004-2008 |
| 7 | * Texas Instruments, <www.ti.com> |
| 8 | * |
| 9 | * Author : |
| 10 | * Sunil Kumar <sunilsaini05@gmail.com> |
| 11 | * Shashi Ranjan <shashiranjanmca05@gmail.com> |
| 12 | * |
| 13 | * Derived from Beagle Board and 3430 SDP code by |
| 14 | * Richard Woodruff <r-woodruff2@ti.com> |
| 15 | * Syed Mohammed Khasim <khasim@ti.com> |
| 16 | * |
| 17 | * |
| 18 | * See file CREDITS for list of people who contributed to this |
| 19 | * project. |
| 20 | * |
| 21 | * This program is free software; you can redistribute it and/or |
| 22 | * modify it under the terms of the GNU General Public License as |
| 23 | * published by the Free Software Foundation; either version 2 of |
| 24 | * the License, or (at your option) any later version. |
| 25 | * |
| 26 | * This program is distributed in the hope that it will be useful, |
| 27 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 28 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 29 | * GNU General Public License for more details. |
| 30 | * |
| 31 | * You should have received a copy of the GNU General Public License |
| 32 | * along with this program; if not, write to the Free Software |
| 33 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 34 | * MA 02111-1307 USA |
| 35 | */ |
| 36 | #include <common.h> |
| 37 | #include <netdev.h> |
| 38 | #include <twl4030.h> |
| 39 | #include <asm/io.h> |
Tom Rini | 743e911 | 2011-09-03 21:50:05 -0400 | [diff] [blame^] | 40 | #include <asm/arch/mmc_host_def.h> |
Luca Ceresoli | 860e2a7 | 2011-04-20 11:02:08 -0400 | [diff] [blame] | 41 | #include <asm/arch/omap3-regs.h> |
| 42 | #include <asm/arch/mux.h> |
| 43 | #include <asm/arch/mem.h> |
| 44 | #include <asm/arch/sys_proto.h> |
| 45 | #include <asm/arch/gpio.h> |
| 46 | #include <asm/mach-types.h> |
| 47 | #include "dig297.h" |
| 48 | |
| 49 | DECLARE_GLOBAL_DATA_PTR; |
| 50 | |
| 51 | #ifdef CONFIG_CMD_NET |
| 52 | static void setup_net_chip(void); |
| 53 | |
| 54 | #define NET_LAN9221_RESET_GPIO 12 |
| 55 | |
| 56 | /* GPMC CS 5 connected to an SMSC LAN9220 ethernet controller */ |
| 57 | #define NET_LAN9220_GPMC_CONFIG1 (DEVICESIZE_16BIT) |
| 58 | #define NET_LAN9220_GPMC_CONFIG2 (CSWROFFTIME(8) | \ |
| 59 | CSRDOFFTIME(7) | \ |
| 60 | ADVONTIME(1)) |
| 61 | #define NET_LAN9220_GPMC_CONFIG3 (ADVWROFFTIME(2) | \ |
| 62 | ADVRDOFFTIME(2) | \ |
| 63 | ADVONTIME(1)) |
| 64 | #define NET_LAN9220_GPMC_CONFIG4 (WEOFFTIME(8) | \ |
| 65 | WEONTIME(1) | \ |
| 66 | OEOFFTIME(7)| \ |
| 67 | OEONTIME(1)) |
| 68 | #define NET_LAN9220_GPMC_CONFIG5 (PAGEBURSTACCESSTIME(0) | \ |
| 69 | RDACCESSTIME(6) | \ |
| 70 | WRCYCLETIME(0x1D) | \ |
| 71 | RDCYCLETIME(0x1D)) |
| 72 | #define NET_LAN9220_GPMC_CONFIG6 ((1 << 31) | \ |
| 73 | WRACCESSTIME(0x1D) | \ |
| 74 | WRDATAONADMUXBUS(3)) |
| 75 | |
| 76 | static const u32 gpmc_lan_config[] = { |
| 77 | NET_LAN9220_GPMC_CONFIG1, |
| 78 | NET_LAN9220_GPMC_CONFIG2, |
| 79 | NET_LAN9220_GPMC_CONFIG3, |
| 80 | NET_LAN9220_GPMC_CONFIG4, |
| 81 | NET_LAN9220_GPMC_CONFIG5, |
| 82 | NET_LAN9220_GPMC_CONFIG6, |
| 83 | /* CONFIG7: computed by enable_gpmc_cs_config() */ |
| 84 | }; |
| 85 | #endif /* CONFIG_CMD_NET */ |
| 86 | |
| 87 | /* |
| 88 | * Routine: board_init |
| 89 | * Description: Early hardware init. |
| 90 | */ |
| 91 | int board_init(void) |
| 92 | { |
| 93 | gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ |
| 94 | /* board id for Linux */ |
| 95 | gd->bd->bi_arch_number = MACH_TYPE_OMAP3_CPS; |
| 96 | /* boot param addr */ |
| 97 | gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); |
| 98 | |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | /* |
| 103 | * Routine: misc_init_r |
| 104 | * Description: Configure board specific parts |
| 105 | */ |
| 106 | int misc_init_r(void) |
| 107 | { |
| 108 | struct gpio *gpio1_base = (struct gpio *)OMAP34XX_GPIO1_BASE; |
| 109 | struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; |
| 110 | |
| 111 | twl4030_power_init(); |
| 112 | twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); |
| 113 | |
| 114 | /* |
| 115 | * GPIO list |
| 116 | * - 159 OUT (GPIO5+31): reset for remote camera interface connector. |
| 117 | * - 19 OUT (GPIO1+19): integrated speaker amplifier (1=on, 0=shdn). |
| 118 | * - 20 OUT (GPIO1+20): handset amplifier (1=on, 0=shdn). |
| 119 | */ |
| 120 | |
| 121 | /* Configure GPIOs to output */ |
| 122 | writel(~(GPIO19 | GPIO20), &gpio1_base->oe); |
| 123 | writel(~(GPIO31), &gpio5_base->oe); |
| 124 | |
| 125 | /* Set GPIO values */ |
| 126 | writel((GPIO19 | GPIO20), &gpio1_base->setdataout); |
| 127 | writel(0, &gpio5_base->setdataout); |
| 128 | |
| 129 | #if defined(CONFIG_CMD_NET) |
| 130 | setup_net_chip(); |
| 131 | #endif |
| 132 | |
| 133 | dieid_num_r(); |
| 134 | |
| 135 | return 0; |
| 136 | } |
| 137 | |
| 138 | /* |
| 139 | * Routine: set_muxconf_regs |
| 140 | * Description: Setting up the configuration Mux registers specific to the |
| 141 | * hardware. Many pins need to be moved from protect to primary |
| 142 | * mode. |
| 143 | */ |
| 144 | void set_muxconf_regs(void) |
| 145 | { |
| 146 | MUX_DIG297(); |
| 147 | } |
| 148 | |
Tom Rini | 743e911 | 2011-09-03 21:50:05 -0400 | [diff] [blame^] | 149 | #ifdef CONFIG_GENERIC_MMC |
| 150 | int board_mmc_init(bd_t *bis) |
| 151 | { |
| 152 | omap_mmc_init(0); |
| 153 | return 0; |
| 154 | } |
| 155 | #endif |
| 156 | |
Luca Ceresoli | 860e2a7 | 2011-04-20 11:02:08 -0400 | [diff] [blame] | 157 | #ifdef CONFIG_CMD_NET |
| 158 | /* |
| 159 | * Routine: setup_net_chip |
| 160 | * Description: Setting up the configuration GPMC registers specific to the |
| 161 | * Ethernet hardware. |
| 162 | */ |
| 163 | static void setup_net_chip(void) |
| 164 | { |
| 165 | struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; |
| 166 | |
| 167 | /* Configure GPMC registers */ |
| 168 | enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], |
| 169 | CONFIG_SMC911X_BASE, GPMC_SIZE_16M); |
| 170 | |
| 171 | /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ |
| 172 | writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); |
| 173 | /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ |
| 174 | writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); |
| 175 | /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ |
| 176 | writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, |
| 177 | &ctrl_base->gpmc_nadv_ale); |
| 178 | |
| 179 | /* Make GPIO 12 as output pin and send a magic pulse through it */ |
| 180 | if (!omap_request_gpio(NET_LAN9221_RESET_GPIO)) { |
| 181 | omap_set_gpio_direction(NET_LAN9221_RESET_GPIO, 0); |
| 182 | omap_set_gpio_dataout(NET_LAN9221_RESET_GPIO, 1); |
| 183 | udelay(1); |
| 184 | omap_set_gpio_dataout(NET_LAN9221_RESET_GPIO, 0); |
| 185 | udelay(31000); /* Should be >= 30ms according to datasheet */ |
| 186 | omap_set_gpio_dataout(NET_LAN9221_RESET_GPIO, 1); |
| 187 | } |
| 188 | } |
| 189 | #endif /* CONFIG_CMD_NET */ |
| 190 | |
| 191 | int board_eth_init(bd_t *bis) |
| 192 | { |
| 193 | int rc = 0; |
| 194 | rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); |
| 195 | return rc; |
| 196 | } |