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York Sun667ab1a2012-10-11 07:13:37 +00001/*
2 * Copyright 2011-2012 Freescale Semiconductor, Inc.
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
York Sun667ab1a2012-10-11 07:13:37 +00005 */
6
7/*
8 * Corenet DS style board configuration file
9 */
York Sun9b85a482013-06-27 10:48:29 -070010#ifndef __T4QDS_H
11#define __T4QDS_H
Liu Gang50082f02013-05-07 16:30:50 +080012
York Sun667ab1a2012-10-11 07:13:37 +000013#define CONFIG_CMD_REGINFO
14
15/* High Level Configuration Options */
York Sun667ab1a2012-10-11 07:13:37 +000016#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
York Sun667ab1a2012-10-11 07:13:37 +000017#define CONFIG_MP /* support multiple processors */
18
19#ifndef CONFIG_SYS_TEXT_BASE
Prabhakar Kushwahaf2036562014-01-14 11:34:26 +053020#define CONFIG_SYS_TEXT_BASE 0xeff40000
York Sun667ab1a2012-10-11 07:13:37 +000021#endif
22
23#ifndef CONFIG_RESET_VECTOR_ADDRESS
24#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
25#endif
26
27#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
York Sunfe845072016-12-28 08:43:45 -080028#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
Robert P. J. Daya8099812016-05-03 19:52:49 -040029#define CONFIG_PCIE1 /* PCIE controller 1 */
30#define CONFIG_PCIE2 /* PCIE controller 2 */
31#define CONFIG_PCIE3 /* PCIE controller 3 */
York Sun667ab1a2012-10-11 07:13:37 +000032#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
33#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
34
35#define CONFIG_SYS_SRIO
36#define CONFIG_SRIO1 /* SRIO port 1 */
37#define CONFIG_SRIO2 /* SRIO port 2 */
38
York Sun667ab1a2012-10-11 07:13:37 +000039#define CONFIG_ENV_OVERWRITE
40
York Sun667ab1a2012-10-11 07:13:37 +000041/*
42 * These can be toggled for performance analysis, otherwise use default.
43 */
44#define CONFIG_SYS_CACHE_STASHING
45#define CONFIG_BTB /* toggle branch predition */
York Sun667ab1a2012-10-11 07:13:37 +000046#ifdef CONFIG_DDR_ECC
47#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
48#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
49#endif
50
51#define CONFIG_ENABLE_36BIT_PHYS
52
York Sun667ab1a2012-10-11 07:13:37 +000053#define CONFIG_ADDR_MAP
54#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
York Sun667ab1a2012-10-11 07:13:37 +000055
York Sun667ab1a2012-10-11 07:13:37 +000056#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
57#define CONFIG_SYS_MEMTEST_END 0x00400000
58#define CONFIG_SYS_ALT_MEMTEST
59#define CONFIG_PANIC_HANG /* do not reset board on panic */
60
61/*
62 * Config the L3 Cache as L3 SRAM
63 */
Shaohui Xie9ff72dc2014-04-22 15:10:44 +080064#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000
65#define CONFIG_SYS_L3_SIZE (512 << 10)
66#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
67#ifdef CONFIG_RAMBOOT_PBL
68#define CONFIG_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
69#endif
70#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
71#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
72#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
73#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10)
York Sun667ab1a2012-10-11 07:13:37 +000074
York Sun667ab1a2012-10-11 07:13:37 +000075#define CONFIG_SYS_DCSRBAR 0xf0000000
76#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
York Sun667ab1a2012-10-11 07:13:37 +000077
York Sun667ab1a2012-10-11 07:13:37 +000078/*
79 * DDR Setup
80 */
81#define CONFIG_VERY_BIG_RAM
82#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
83#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
84
York Sun667ab1a2012-10-11 07:13:37 +000085#define CONFIG_DIMM_SLOTS_PER_CTLR 2
86#define CONFIG_CHIP_SELECTS_PER_CTRL 4
87#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
88
89#define CONFIG_DDR_SPD
York Sun667ab1a2012-10-11 07:13:37 +000090
York Sun667ab1a2012-10-11 07:13:37 +000091/*
92 * IFC Definitions
93 */
94#define CONFIG_SYS_FLASH_BASE 0xe0000000
York Sun667ab1a2012-10-11 07:13:37 +000095#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE)
York Sun667ab1a2012-10-11 07:13:37 +000096
Shaohui Xie9ff72dc2014-04-22 15:10:44 +080097#ifdef CONFIG_SPL_BUILD
98#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
99#else
100#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
101#endif
York Sun667ab1a2012-10-11 07:13:37 +0000102
York Sun667ab1a2012-10-11 07:13:37 +0000103#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
104#define CONFIG_MISC_INIT_R
105
106#define CONFIG_HWCONFIG
107
108/* define to use L1 as initial stack */
109#define CONFIG_L1_INIT_RAM
110#define CONFIG_SYS_INIT_RAM_LOCK
111#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
York Sun667ab1a2012-10-11 07:13:37 +0000112#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
York Sunee7b4832015-08-17 13:31:51 -0700113#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
York Sun667ab1a2012-10-11 07:13:37 +0000114/* The assembler doesn't like typecast */
115#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
116 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
117 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
York Sun667ab1a2012-10-11 07:13:37 +0000118#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
119
120#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
121 GENERATED_GBL_DATA_SIZE)
122#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
123
Prabhakar Kushwahaf4027312014-03-31 15:31:48 +0530124#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
York Sun667ab1a2012-10-11 07:13:37 +0000125#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
126
127/* Serial Port - controlled on board with jumper J8
128 * open - index 2
129 * shorted - index 1
130 */
131#define CONFIG_CONS_INDEX 1
York Sun667ab1a2012-10-11 07:13:37 +0000132#define CONFIG_SYS_NS16550_SERIAL
133#define CONFIG_SYS_NS16550_REG_SIZE 1
134#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
135
136#define CONFIG_SYS_BAUDRATE_TABLE \
137 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
138
139#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
140#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
141#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
142#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
143
York Sun667ab1a2012-10-11 07:13:37 +0000144/* I2C */
Heiko Schocherf2850742012-10-24 13:48:22 +0200145#define CONFIG_SYS_I2C
146#define CONFIG_SYS_I2C_FSL
Heiko Schocherf2850742012-10-24 13:48:22 +0200147#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
148#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
Heiko Schocherf2850742012-10-24 13:48:22 +0200149#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
150#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
151
York Sun667ab1a2012-10-11 07:13:37 +0000152/*
153 * RapidIO
154 */
155#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000
York Sun667ab1a2012-10-11 07:13:37 +0000156#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull
York Sun667ab1a2012-10-11 07:13:37 +0000157#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */
158
159#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000
York Sun667ab1a2012-10-11 07:13:37 +0000160#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull
York Sun667ab1a2012-10-11 07:13:37 +0000161#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */
162
163/*
York Sun667ab1a2012-10-11 07:13:37 +0000164 * General PCI
165 * Memory space is mapped 1-1, but I/O space must start from 0.
166 */
167
168/* controller 1, direct to uli, tgtid 3, Base address 20000 */
169#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
York Sun667ab1a2012-10-11 07:13:37 +0000170#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000
171#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
York Sun667ab1a2012-10-11 07:13:37 +0000172#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
173#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000
174#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
York Sun667ab1a2012-10-11 07:13:37 +0000175#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull
York Sun667ab1a2012-10-11 07:13:37 +0000176#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
177
178/* controller 2, Slot 2, tgtid 2, Base address 201000 */
179#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000
York Sun667ab1a2012-10-11 07:13:37 +0000180#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000
181#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull
York Sun667ab1a2012-10-11 07:13:37 +0000182#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
183#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000
184#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
York Sun667ab1a2012-10-11 07:13:37 +0000185#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull
York Sun667ab1a2012-10-11 07:13:37 +0000186#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
187
188/* controller 3, Slot 1, tgtid 1, Base address 202000 */
189#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000
York Sun667ab1a2012-10-11 07:13:37 +0000190#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000
191#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull
York Sun667ab1a2012-10-11 07:13:37 +0000192#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */
193#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
194#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
York Sun667ab1a2012-10-11 07:13:37 +0000195#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
York Sun667ab1a2012-10-11 07:13:37 +0000196#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
197
198/* controller 4, Base address 203000 */
199#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000
200#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull
201#define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */
202#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000
203#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
204#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */
205
York Sun667ab1a2012-10-11 07:13:37 +0000206#ifdef CONFIG_PCI
Gabor Juhosb4458732013-05-30 07:06:12 +0000207#define CONFIG_PCI_INDIRECT_BRIDGE
York Sun667ab1a2012-10-11 07:13:37 +0000208
209#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
York Sun667ab1a2012-10-11 07:13:37 +0000210#endif /* CONFIG_PCI */
211
212/* SATA */
213#ifdef CONFIG_FSL_SATA_V2
214#define CONFIG_LIBATA
215#define CONFIG_FSL_SATA
216
217#define CONFIG_SYS_SATA_MAX_DEVICE 2
218#define CONFIG_SATA1
219#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
220#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
221#define CONFIG_SATA2
222#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
223#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
224
225#define CONFIG_LBA48
226#define CONFIG_CMD_SATA
York Sun667ab1a2012-10-11 07:13:37 +0000227#endif
228
229#ifdef CONFIG_FMAN_ENET
230#define CONFIG_MII /* MII PHY management */
231#define CONFIG_ETHPRIME "FM1@DTSEC1"
232#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
233#endif
234
235/*
236 * Environment
237 */
238#define CONFIG_LOADS_ECHO /* echo on for serial download */
239#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
240
241/*
242 * Command line configuration.
243 */
York Sun667ab1a2012-10-11 07:13:37 +0000244#define CONFIG_CMD_ERRATA
York Sun667ab1a2012-10-11 07:13:37 +0000245#define CONFIG_CMD_IRQ
York Sun667ab1a2012-10-11 07:13:37 +0000246
247#ifdef CONFIG_PCI
248#define CONFIG_CMD_PCI
York Sun667ab1a2012-10-11 07:13:37 +0000249#endif
250
251/*
York Sun667ab1a2012-10-11 07:13:37 +0000252 * Miscellaneous configurable options
253 */
254#define CONFIG_SYS_LONGHELP /* undef to save memory */
255#define CONFIG_CMDLINE_EDITING /* Command-line editing */
256#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
257#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
York Sun667ab1a2012-10-11 07:13:37 +0000258#ifdef CONFIG_CMD_KGDB
259#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
260#else
261#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
262#endif
263#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
264#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
265#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
York Sun667ab1a2012-10-11 07:13:37 +0000266
267/*
268 * For booting Linux, the board info and command line data
269 * have to be in the first 64 MB of memory, since this is
270 * the maximum mapped by the Linux kernel during initialization.
271 */
272#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
273#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
274
275#ifdef CONFIG_CMD_KGDB
276#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
York Sun667ab1a2012-10-11 07:13:37 +0000277#endif
278
279/*
280 * Environment Configuration
281 */
282#define CONFIG_ROOTPATH "/opt/nfsroot"
283#define CONFIG_BOOTFILE "uImage"
284#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
285
286/* default location for tftp and bootm */
287#define CONFIG_LOADADDR 1000000
288
York Sun667ab1a2012-10-11 07:13:37 +0000289#define CONFIG_BAUDRATE 115200
290
York Sun667ab1a2012-10-11 07:13:37 +0000291#define CONFIG_HVBOOT \
292 "setenv bootargs config-addr=0x60000000; " \
293 "bootm 0x01000000 - 0x00f00000"
294
York Sun667ab1a2012-10-11 07:13:37 +0000295#endif /* __CONFIG_H */