blob: 44345ddf8c3fdc76f241c562296a4336908117af [file] [log] [blame]
Heiko Schocherdc5f4e42007-02-16 07:57:42 +01001/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocherdc5f4e42007-02-16 07:57:42 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
Masahiro Yamada608ed2c2014-01-16 11:03:07 +090016#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010017#define CONFIG_JUPITER 1 /* ... on Jupiter board */
18
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020019/*
20 * Valid values for CONFIG_SYS_TEXT_BASE are:
21 * 0xFFF00000 boot high (standard configuration)
22 * 0x00100000 boot from RAM (for testing only)
23 */
24#ifndef CONFIG_SYS_TEXT_BASE
25#define CONFIG_SYS_TEXT_BASE 0xFFF00000
26#endif
27
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020028#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010029
30#define CONFIG_BOARD_EARLY_INIT_R 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010031
Becky Bruce03ea1be2008-05-08 19:02:12 -050032#define CONFIG_HIGH_BATS 1 /* High BATs supported */
33
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010034/*
35 * Serial console configuration
36 */
37#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
38#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020039#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010040
41/*
42 * PCI Mapping:
43 * 0x40000000 - 0x4fffffff - PCI Memory
44 * 0x50000000 - 0x50ffffff - PCI IO Space
45 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010046
47#if defined(CONFIG_PCI)
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010048#define CONFIG_PCI_SCAN_SHOW 1
TsiChung Liew521f97b2008-03-30 01:19:06 -050049#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010050
51#define CONFIG_PCI_MEM_BUS 0x40000000
52#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
53#define CONFIG_PCI_MEM_SIZE 0x10000000
54
55#define CONFIG_PCI_IO_BUS 0x50000000
56#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
57#define CONFIG_PCI_IO_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010058#endif
59
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020060#define CONFIG_SYS_XLB_PIPELINING 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010061
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010062#define CONFIG_MII 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020063#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010064
65/* Partitions */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010066
67#define CONFIG_TIMESTAMP /* Print image info with timestamp */
68
69/*
Jon Loeliger140b69c2007-07-10 09:38:02 -050070 * BOOTP options
71 */
72#define CONFIG_BOOTP_BOOTFILESIZE
73#define CONFIG_BOOTP_BOOTPATH
74#define CONFIG_BOOTP_GATEWAY
75#define CONFIG_BOOTP_HOSTNAME
76
Jon Loeliger140b69c2007-07-10 09:38:02 -050077/*
Jon Loeligerca8b5662007-07-04 22:32:51 -050078 * Command line configuration.
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010079 */
Jon Loeligerca8b5662007-07-04 22:32:51 -050080
Jon Loeliger140b69c2007-07-10 09:38:02 -050081#if defined(CONFIG_PCI)
82#define CODFIG_CMD_PCI
83#endif
84
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010085/*
86 * Autobooting
87 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010088
89#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk1baed662008-03-03 12:16:44 +010090 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010091 "echo"
92
93#undef CONFIG_BOOTARGS
94
95#define CONFIG_EXTRA_ENV_SETTINGS \
96 "netdev=eth0\0" \
97 "nfsargs=setenv bootargs root=/dev/nfs rw " \
98 "nfsroot=${serverip}:${rootpath}\0" \
99 "ramargs=setenv bootargs root=/dev/ram rw\0" \
100 "addip=setenv bootargs ${bootargs} " \
101 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
102 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100103 "flash_nfs=run nfsargs addip addcons;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100104 "bootm ${kernel_addr}\0" \
105 "flash_self=run ramargs addip;" \
106 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100107 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100108 "${baudrate}\0" \
109 "contyp=ttyS0\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100110 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100111 "bootm\0" \
112 "rootpath=/opt/eldk/ppc_6xx\0" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100113 "bootfile=/tftpboot/jupiter/uImage\0" \
114 ""
115
116#define CONFIG_BOOTCOMMAND "run flash_self"
117
118/*
119 * IPB Bus clocking configuration.
120 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200121#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100122
123#if 0
124/* pass open firmware flat tree */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100125#define OF_CPU "PowerPC,5200@0"
126#define OF_SOC "soc5200@f0000000"
127#define OF_TBCLK (bd->bi_busfreq / 8)
128#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
129#endif
130
131#if 0
132/*
133 * I2C configuration
134 */
135#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200136#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100137
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200138#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
139#define CONFIG_SYS_I2C_SLAVE 0x7F
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100140
141/*
142 * EEPROM configuration
143 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200144#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
145#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
146#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
147#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100148#endif
149
150/*
151 * Flash configuration
152 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200153#define CONFIG_SYS_FLASH_BASE 0xFF000000
154#define CONFIG_SYS_FLASH_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100155
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200156#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100157
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200158#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100159
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200160#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
161#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100162
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200163#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100164
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200165#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200166#define CONFIG_SYS_FLASH_CFI
167#define CONFIG_SYS_FLASH_EMPTY_INFO
168#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
169#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
170#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100171
172/*
173 * Environment settings
174 */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200175#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200176#define CONFIG_ENV_SIZE 0x20000
177#define CONFIG_ENV_SECT_SIZE 0x20000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100178#define CONFIG_ENV_OVERWRITE 1
179
Heiko Schocher162bbec2007-03-13 09:40:59 +0100180/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200181#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
182#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Heiko Schocher162bbec2007-03-13 09:40:59 +0100183
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100184/*
185 * Memory map
186 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200187#define CONFIG_SYS_MBAR 0xF0000000
188#define CONFIG_SYS_SDRAM_BASE 0x00000000
189#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100190
191/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200192#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200193#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100194
Wolfgang Denk0191e472010-10-26 14:34:52 +0200195#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200196#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100197
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200198#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200199#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
200# define CONFIG_SYS_RAMBOOT 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100201#endif
202
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200203#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
204#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
205#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100206
207/*
208 * Ethernet configuration
209 */
210#define CONFIG_MPC5xxx_FEC 1
Ben Warrenbc1b9172009-02-05 23:58:25 -0800211#define CONFIG_MPC5xxx_FEC_MII100
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100212/*
Ben Warrenbc1b9172009-02-05 23:58:25 -0800213 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100214 */
Ben Warrenbc1b9172009-02-05 23:58:25 -0800215/* #define CONFIG_MPC5xxx_FEC_MII10 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100216#define CONFIG_PHY_ADDR 0x00
217
218/*
219 * GPIO configuration
220 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200221#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100222
223/*
224 * Miscellaneous configurable options
225 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200226#define CONFIG_SYS_LONGHELP /* undef to save memory */
Heiko Schocher162bbec2007-03-13 09:40:59 +0100227
228#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500229#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200230#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100231#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200232#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100233#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200234#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
235#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
236#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100237
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200238#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
239#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
240#define CONFIG_SYS_ALT_MEMTEST 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100241
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200242#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100243
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200244#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500245#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200246# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500247#endif
248
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100249/*
250 * Various low-level settings
251 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200252#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
253#define CONFIG_SYS_HID0_FINAL HID0_ICE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100254
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200255#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
256#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
257#define CONFIG_SYS_BOOTCS_CFG 0x00047801
258#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
259#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100260
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200261#define CONFIG_SYS_CS_BURST 0x00000000
262#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100263
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200264#define CONFIG_SYS_RESET_ADDRESS 0xff000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100265
266#endif /* __CONFIG_H */