Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2013 CompuLab, Ltd. |
| 3 | * Author: Igor Grinberg <grinberg@compulab.co.il> |
| 4 | * |
| 5 | * Configuration settings for the CompuLab CM-T3517 board |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
| 13 | /* |
| 14 | * High Level Configuration Options |
| 15 | */ |
| 16 | #define CONFIG_OMAP /* in a TI OMAP core */ |
| 17 | #define CONFIG_CM_T3517 /* working with CM-T3517 */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 18 | |
| 19 | #define CONFIG_SYS_TEXT_BASE 0x80008000 |
| 20 | |
| 21 | /* |
| 22 | * This is needed for the DMA stuff. |
| 23 | * Although the default iss 64, we still define it |
| 24 | * to be on the safe side once the default is changed. |
| 25 | */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 26 | |
| 27 | #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ |
| 28 | |
| 29 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
Nishanth Menon | fa96c96 | 2015-03-09 17:12:04 -0500 | [diff] [blame] | 30 | #include <asm/arch/omap.h> |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 31 | |
Dmitry Lifshitz | a65120c | 2015-09-09 11:27:17 +0300 | [diff] [blame] | 32 | #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517 |
| 33 | |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 34 | /* Clock Defines */ |
| 35 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 36 | #define V_SCLK (V_OSCK >> 1) |
| 37 | |
| 38 | #define CONFIG_MISC_INIT_R |
| 39 | |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 40 | /* |
| 41 | * The early kernel mapping on ARM currently only maps from the base of DRAM |
| 42 | * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. |
| 43 | * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, |
| 44 | * so that leaves DRAM base to DRAM base + 0x4000 available. |
| 45 | */ |
| 46 | #define CONFIG_SYS_BOOTMAPSZ 0x4000 |
| 47 | |
| 48 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 49 | #define CONFIG_SETUP_MEMORY_TAGS |
| 50 | #define CONFIG_INITRD_TAG |
| 51 | #define CONFIG_REVISION_TAG |
| 52 | #define CONFIG_SERIAL_TAG |
| 53 | |
| 54 | /* |
| 55 | * Size of malloc() pool |
| 56 | */ |
Dmitry Lifshitz | 4fb49e0 | 2015-09-09 11:25:39 +0300 | [diff] [blame] | 57 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 58 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) |
| 59 | |
| 60 | /* |
| 61 | * Hardware drivers |
| 62 | */ |
| 63 | |
| 64 | /* |
| 65 | * NS16550 Configuration |
| 66 | */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 67 | #define CONFIG_SYS_NS16550_SERIAL |
| 68 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 69 | #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 70 | |
| 71 | /* |
| 72 | * select serial console configuration |
| 73 | */ |
| 74 | #define CONFIG_CONS_INDEX 3 |
| 75 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
| 76 | #define CONFIG_SERIAL3 3 /* UART3 */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 77 | |
| 78 | /* allow to overwrite serial and ethaddr */ |
| 79 | #define CONFIG_ENV_OVERWRITE |
| 80 | #define CONFIG_BAUDRATE 115200 |
| 81 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
| 82 | 115200} |
| 83 | |
| 84 | #define CONFIG_OMAP_GPIO |
| 85 | |
Igor Grinberg | f7fd7e4 | 2014-11-03 11:32:25 +0200 | [diff] [blame] | 86 | /* USB */ |
| 87 | #define CONFIG_USB_MUSB_AM35X |
| 88 | |
| 89 | #ifndef CONFIG_USB_MUSB_AM35X |
| 90 | #define CONFIG_USB_OMAP3 |
| 91 | #define CONFIG_USB_EHCI |
| 92 | #define CONFIG_USB_EHCI_OMAP |
| 93 | #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 |
| 94 | #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 |
| 95 | #else /* !CONFIG_USB_MUSB_AM35X */ |
Paul Kocialkowski | f34dfcb | 2015-08-04 17:04:06 +0200 | [diff] [blame] | 96 | #define CONFIG_USB_MUSB_PIO_ONLY |
Igor Grinberg | f7fd7e4 | 2014-11-03 11:32:25 +0200 | [diff] [blame] | 97 | #endif /* CONFIG_USB_MUSB_AM35X */ |
| 98 | |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 99 | /* commands to include */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 100 | #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ |
| 101 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 102 | #define CONFIG_MTD_PARTITIONS |
| 103 | #define MTDIDS_DEFAULT "nand0=nand" |
| 104 | #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ |
| 105 | "1920k(u-boot),256k(u-boot-env),"\ |
| 106 | "4m(kernel),-(fs)" |
| 107 | |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 108 | #define CONFIG_CMD_NAND /* NAND support */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 109 | |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 110 | #define CONFIG_SYS_I2C |
| 111 | #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 |
| 112 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 |
| 113 | #define CONFIG_SYS_I2C_OMAP34XX |
| 114 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
| 115 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 116 | #define CONFIG_SYS_I2C_EEPROM_BUS 0 |
| 117 | #define CONFIG_I2C_MULTI_BUS |
| 118 | |
| 119 | /* |
| 120 | * Board NAND Info. |
| 121 | */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 122 | #define CONFIG_NAND_OMAP_GPMC |
| 123 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
| 124 | /* to access nand */ |
| 125 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
| 126 | /* to access nand at */ |
| 127 | /* CS0 */ |
| 128 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ |
| 129 | /* devices */ |
| 130 | |
| 131 | /* Environment information */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 132 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 133 | "loadaddr=0x82000000\0" \ |
| 134 | "baudrate=115200\0" \ |
| 135 | "console=ttyO2,115200n8\0" \ |
Dmitry Lifshitz | 0233cbc | 2015-09-08 09:50:00 +0300 | [diff] [blame] | 136 | "netretry=yes\0" \ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 137 | "mpurate=auto\0" \ |
| 138 | "vram=12M\0" \ |
| 139 | "dvimode=1024x768MR-16@60\0" \ |
| 140 | "defaultdisplay=dvi\0" \ |
| 141 | "mmcdev=0\0" \ |
| 142 | "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ |
| 143 | "mmcrootfstype=ext4\0" \ |
| 144 | "nandroot=/dev/mtdblock4 rw\0" \ |
| 145 | "nandrootfstype=ubifs\0" \ |
| 146 | "mmcargs=setenv bootargs console=${console} " \ |
| 147 | "mpurate=${mpurate} " \ |
| 148 | "vram=${vram} " \ |
| 149 | "omapfb.mode=dvi:${dvimode} " \ |
| 150 | "omapdss.def_disp=${defaultdisplay} " \ |
| 151 | "root=${mmcroot} " \ |
| 152 | "rootfstype=${mmcrootfstype}\0" \ |
| 153 | "nandargs=setenv bootargs console=${console} " \ |
| 154 | "mpurate=${mpurate} " \ |
| 155 | "vram=${vram} " \ |
| 156 | "omapfb.mode=dvi:${dvimode} " \ |
| 157 | "omapdss.def_disp=${defaultdisplay} " \ |
| 158 | "root=${nandroot} " \ |
| 159 | "rootfstype=${nandrootfstype}\0" \ |
| 160 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
| 161 | "bootscript=echo Running bootscript from mmc ...; " \ |
| 162 | "source ${loadaddr}\0" \ |
| 163 | "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ |
| 164 | "mmcboot=echo Booting from mmc ...; " \ |
| 165 | "run mmcargs; " \ |
| 166 | "bootm ${loadaddr}\0" \ |
| 167 | "nandboot=echo Booting from nand ...; " \ |
| 168 | "run nandargs; " \ |
| 169 | "nand read ${loadaddr} 2a0000 400000; " \ |
| 170 | "bootm ${loadaddr}\0" \ |
| 171 | |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 172 | #define CONFIG_BOOTCOMMAND \ |
| 173 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
| 174 | "if run loadbootscript; then " \ |
| 175 | "run bootscript; " \ |
| 176 | "else " \ |
| 177 | "if run loaduimage; then " \ |
| 178 | "run mmcboot; " \ |
| 179 | "else run nandboot; " \ |
| 180 | "fi; " \ |
| 181 | "fi; " \ |
| 182 | "else run nandboot; fi" |
| 183 | |
| 184 | /* |
| 185 | * Miscellaneous configurable options |
| 186 | */ |
| 187 | #define CONFIG_AUTO_COMPLETE |
| 188 | #define CONFIG_CMDLINE_EDITING |
| 189 | #define CONFIG_TIMESTAMP |
| 190 | #define CONFIG_SYS_AUTOLOAD "no" |
| 191 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 192 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
| 193 | /* Print Buffer Size */ |
| 194 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 195 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 196 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
| 197 | /* Boot Argument Buffer Size */ |
| 198 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 199 | |
| 200 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) |
| 201 | |
| 202 | /* |
| 203 | * AM3517 has 12 GP timers, they can be driven by the system clock |
| 204 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 205 | * This rate is divided by a local divisor. |
| 206 | */ |
| 207 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
| 208 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
| 209 | #define CONFIG_SYS_HZ 1000 |
| 210 | |
| 211 | /*----------------------------------------------------------------------- |
| 212 | * Physical Memory Map |
| 213 | */ |
| 214 | #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ |
| 215 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 216 | #define CONFIG_SYS_CS0_SIZE (256 << 20) |
| 217 | |
| 218 | /*----------------------------------------------------------------------- |
| 219 | * FLASH and environment organization |
| 220 | */ |
| 221 | |
| 222 | /* **** PISMO SUPPORT *** */ |
| 223 | /* Monitor at start of flash */ |
| 224 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
| 225 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
| 226 | |
| 227 | #define CONFIG_ENV_IS_IN_NAND |
| 228 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
| 229 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
| 230 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
| 231 | |
Igor Grinberg | dfb92d0 | 2014-11-03 11:32:26 +0200 | [diff] [blame] | 232 | #if defined(CONFIG_CMD_NET) |
| 233 | #define CONFIG_DRIVER_TI_EMAC |
| 234 | #define CONFIG_DRIVER_TI_EMAC_USE_RMII |
| 235 | #define CONFIG_MII |
| 236 | #define CONFIG_SMC911X |
| 237 | #define CONFIG_SMC911X_32_BIT |
| 238 | #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20)) |
Dmitry Lifshitz | 0233cbc | 2015-09-08 09:50:00 +0300 | [diff] [blame] | 239 | #define CONFIG_ARP_TIMEOUT 200UL |
| 240 | #define CONFIG_NET_RETRY_COUNT 5 |
Igor Grinberg | dfb92d0 | 2014-11-03 11:32:26 +0200 | [diff] [blame] | 241 | #endif /* CONFIG_CMD_NET */ |
| 242 | |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 243 | /* additions for new relocation code, must be added to all boards */ |
| 244 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 245 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 246 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
| 247 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 248 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 249 | GENERATED_GBL_DATA_SIZE) |
| 250 | |
| 251 | /* Status LED */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 252 | #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 253 | |
| 254 | /* GPIO banks */ |
Uri Mashiach | 4892d39 | 2017-01-19 10:51:45 +0200 | [diff] [blame] | 255 | #ifdef CONFIG_LED_STATUS |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 256 | #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ |
| 257 | #endif |
| 258 | |
Igor Grinberg | 62a9585 | 2014-11-03 11:32:27 +0200 | [diff] [blame] | 259 | /* Display Configuration */ |
| 260 | #define CONFIG_OMAP3_GPIO_2 |
| 261 | #define CONFIG_OMAP3_GPIO_5 |
| 262 | #define CONFIG_VIDEO_OMAP3 |
| 263 | #define LCD_BPP LCD_COLOR16 |
| 264 | |
Igor Grinberg | 62a9585 | 2014-11-03 11:32:27 +0200 | [diff] [blame] | 265 | #define CONFIG_SPLASH_SCREEN |
| 266 | #define CONFIG_SPLASHIMAGE_GUARD |
| 267 | #define CONFIG_CMD_BMP |
| 268 | #define CONFIG_BMP_16BPP |
| 269 | #define CONFIG_SCF0403_LCD |
| 270 | |
| 271 | #define CONFIG_OMAP3_SPI |
| 272 | |
Nikita Kiryanov | 8e06caf | 2016-04-16 17:55:08 +0300 | [diff] [blame] | 273 | /* EEPROM */ |
| 274 | #define CONFIG_CMD_EEPROM |
| 275 | #define CONFIG_ENV_EEPROM_IS_ON_I2C |
| 276 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 277 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 |
| 278 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 |
| 279 | #define CONFIG_SYS_EEPROM_SIZE 256 |
| 280 | |
| 281 | #define CONFIG_CMD_EEPROM_LAYOUT |
| 282 | #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3" |
| 283 | |
Igor Grinberg | c3373ee | 2014-11-05 14:25:35 +0200 | [diff] [blame] | 284 | #endif /* __CONFIG_H */ |