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Mike Frysingerd014e352008-10-12 21:41:06 -04001/*
Bin Meng75574052016-02-05 19:30:11 -08002 * U-Boot - Configuration file for CM-BF537E board
Mike Frysingerd014e352008-10-12 21:41:06 -04003 */
4
5#ifndef __CONFIG_CM_BF537E_H__
6#define __CONFIG_CM_BF537E_H__
7
Mike Frysinger18a407c2009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysingerd014e352008-10-12 21:41:06 -04009
Mike Frysingerd014e352008-10-12 21:41:06 -040010/*
11 * Processor Settings
12 */
Mike Frysinger5b0c1282010-12-23 14:58:37 -050013#define CONFIG_BFIN_CPU bf537-0.2
Mike Frysingerd014e352008-10-12 21:41:06 -040014#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
15
Mike Frysingerd014e352008-10-12 21:41:06 -040016/*
17 * Clock Settings
18 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
19 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
20 */
21/* CONFIG_CLKIN_HZ is any value in Hz */
22#define CONFIG_CLKIN_HZ 25000000
23/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
24/* 1 = CLKIN / 2 */
25#define CONFIG_CLKIN_HALF 0
26/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
27/* 1 = bypass PLL */
28#define CONFIG_PLL_BYPASS 0
29/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
30/* Values can range from 0-63 (where 0 means 64) */
31#define CONFIG_VCO_MULT 21
32/* CCLK_DIV controls the core clock divider */
33/* Values can be 1, 2, 4, or 8 ONLY */
34#define CONFIG_CCLK_DIV 1
35/* SCLK_DIV controls the system clock divider */
36/* Values can range from 1-15 */
37#define CONFIG_SCLK_DIV 4
38
Harald Krapfenbauer2bdd9192009-10-14 08:37:32 -040039/* Decrease core voltage */
40#define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)
41
Mike Frysingerd014e352008-10-12 21:41:06 -040042/*
43 * Memory Settings
44 */
45#define CONFIG_MEM_ADD_WDTH 9
46#define CONFIG_MEM_SIZE 32
47
48#define CONFIG_EBIU_SDRRC_VAL 0x3f8
49#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
50
51#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
52#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
53#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
54
Sonic Zhangbae41b72013-12-09 12:45:29 +080055#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
Mike Frysingerd014e352008-10-12 21:41:06 -040056#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
57
Mike Frysingerd014e352008-10-12 21:41:06 -040058/*
59 * Network Settings
60 */
61#ifndef __ADSPBF534__
62#define ADI_CMDS_NETWORK 1
63#define CONFIG_BFIN_MAC
Harald Krapfenbauer8ff448d2011-05-17 15:25:54 -040064#define CONFIG_SMC911X 1
65#define CONFIG_SMC911X_BASE 0x20308000
66#define CONFIG_SMC911X_16_BIT
Mike Frysingerd014e352008-10-12 21:41:06 -040067#define CONFIG_NETCONSOLE 1
Mike Frysingerd014e352008-10-12 21:41:06 -040068#endif
69#define CONFIG_HOSTNAME cm-bf537e
Mike Frysingerd014e352008-10-12 21:41:06 -040070
71/*
72 * Flash Settings
73 */
74#define CONFIG_FLASH_CFI_DRIVER
75#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
76#define CONFIG_SYS_FLASH_BASE 0x20000000
77#define CONFIG_SYS_FLASH_CFI
78#define CONFIG_SYS_FLASH_PROTECTION
79#define CONFIG_SYS_MAX_FLASH_BANKS 1
Harald Krapfenbauerb46c3472009-08-18 04:49:57 -040080#define CONFIG_SYS_MAX_FLASH_SECT 35
Mike Frysingerd014e352008-10-12 21:41:06 -040081
Mike Frysingerd014e352008-10-12 21:41:06 -040082/*
Harald Krapfenbauer6f0c8f82011-05-17 15:39:54 -040083 * SPI Settings
84 */
85#define CONFIG_BFIN_SPI
86#define CONFIG_ENV_SPI_MAX_HZ 30000000
87
Harald Krapfenbauer6f0c8f82011-05-17 15:39:54 -040088/*
Mike Frysingerd014e352008-10-12 21:41:06 -040089 * Env Storage Settings
90 */
91#define CONFIG_ENV_IS_IN_FLASH 1
Harald Krapfenbauerc8e10ee2011-05-17 15:45:36 -040092#define CONFIG_ENV_OFFSET 0x8000
93#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
94#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
95#define CONFIG_ENV_SECT_SIZE 0x8000
Mike Frysingerd014e352008-10-12 21:41:06 -040096#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
97#define ENV_IS_EMBEDDED
Mike Frysingerd014e352008-10-12 21:41:06 -040098#endif
Mike Frysinger37f48702009-06-14 06:29:07 -040099#ifdef ENV_IS_EMBEDDED
100/* WARNING - the following is hand-optimized to fit within
101 * the sector before the environment sector. If it throws
102 * an error during compilation remove an object here to get
103 * it linked after the configuration sector.
104 */
105# define LDS_BOARD_TEXT \
Masahiro Yamada30a198b2013-11-11 14:36:00 +0900106 arch/blackfin/lib/built-in.o (.text*); \
107 arch/blackfin/cpu/built-in.o (.text*); \
Mike Frysinger37f48702009-06-14 06:29:07 -0400108 . = DEFINED(env_offset) ? env_offset : .; \
Mike Frysingera0d60412010-11-19 19:28:56 -0500109 common/env_embedded.o (.text*);
Mike Frysinger37f48702009-06-14 06:29:07 -0400110#endif
Mike Frysingerd014e352008-10-12 21:41:06 -0400111
Mike Frysingerd014e352008-10-12 21:41:06 -0400112/*
113 * I2C Settings
114 */
Scott Jiang80d27fa2014-11-13 15:30:55 +0800115#define CONFIG_SYS_I2C
Scott Jiang655761e2014-11-13 15:30:53 +0800116#define CONFIG_SYS_I2C_ADI
Mike Frysingerd014e352008-10-12 21:41:06 -0400117
Mike Frysingerd014e352008-10-12 21:41:06 -0400118/*
Harald Krapfenbauer6f0c8f82011-05-17 15:39:54 -0400119 * SPI_MMC Settings
120 */
Harald Krapfenbauer6f0c8f82011-05-17 15:39:54 -0400121#define CONFIG_MMC_SPI
122
Harald Krapfenbauer6f0c8f82011-05-17 15:39:54 -0400123/*
Mike Frysingerd014e352008-10-12 21:41:06 -0400124 * Misc Settings
125 */
126#define CONFIG_BAUDRATE 115200
127#define CONFIG_MISC_INIT_R
128#define CONFIG_RTC_BFIN
129#define CONFIG_UART_CONSOLE 0
Harald Krapfenbauer2bdd9192009-10-14 08:37:32 -0400130#define CONFIG_BOOTCOMMAND "run flashboot"
131#define FLASHBOOT_ENV_SETTINGS \
Harald Krapfenbauerc8e10ee2011-05-17 15:45:36 -0400132 "flashboot=flread 20040000 1000000 3c0000;" \
Harald Krapfenbauer2bdd9192009-10-14 08:37:32 -0400133 "bootm 0x1000000\0"
Sonic Zhangbae41b72013-12-09 12:45:29 +0800134#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024))
Mike Frysingerd014e352008-10-12 21:41:06 -0400135
136/*
137 * Pull in common ADI header for remaining command/environment setup
138 */
139#include <configs/bfin_adi_common.h>
140
Mike Frysingerd014e352008-10-12 21:41:06 -0400141#endif