blob: be937998e62ad9faf0fa955623c261d0e1b215e8 [file] [log] [blame]
Xu Ziyuan535b3dc2016-08-01 08:46:19 +08001CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SYS_MALLOC_F_LEN=0x2000
4CONFIG_ROCKCHIP_RK3288=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +09005CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
Eddie Cai1e1a79f2017-01-18 11:03:54 +08006CONFIG_TARGET_TINKER_RK3288=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +08007CONFIG_SPL_STACK_R_ADDR=0x80000
Eddie Cai1e1a79f2017-01-18 11:03:54 +08008CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
Tom Rini256aa742017-06-19 09:47:40 -04009CONFIG_DEBUG_UART=y
Simon Glass73c18b42017-07-23 21:19:39 -060010CONFIG_ENV_IS_IN_MMC=y
Simon Glass4458d3b2016-10-17 20:12:35 -060011CONFIG_SILENT_CONSOLE=y
Simon Glass9fd2a022016-10-17 20:12:37 -060012CONFIG_CONSOLE_MUX=y
13# CONFIG_DISPLAY_CPUINFO is not set
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080014CONFIG_SPL_STACK_R=y
15CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Jonas Karlman269a37f2017-04-22 08:57:54 +000016CONFIG_SPL_I2C_SUPPORT=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080017# CONFIG_CMD_IMLS is not set
Patrick Delaunay73287092017-01-27 11:00:42 +010018CONFIG_CMD_GPT=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080019CONFIG_CMD_MMC=y
20CONFIG_CMD_SF=y
21CONFIG_CMD_SPI=y
22CONFIG_CMD_I2C=y
Eddie Caid1ba93e2017-03-07 12:47:07 +080023CONFIG_CMD_USB=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080024CONFIG_CMD_GPIO=y
25# CONFIG_CMD_SETEXPR is not set
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080026CONFIG_CMD_CACHE=y
27CONFIG_CMD_TIME=y
28CONFIG_CMD_PMIC=y
29CONFIG_CMD_REGULATOR=y
Patrick Delaunayf7e07722017-01-27 11:00:37 +010030# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunay21d3bce2017-01-27 11:00:38 +010031# CONFIG_SPL_ISO_PARTITION is not set
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +010032# CONFIG_SPL_EFI_PARTITION is not set
Patrick Delaunay73287092017-01-27 11:00:42 +010033CONFIG_SPL_PARTITION_UUIDS=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080034CONFIG_SPL_OF_CONTROL=y
35CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
36CONFIG_REGMAP=y
37CONFIG_SPL_REGMAP=y
38CONFIG_SYSCON=y
39CONFIG_SPL_SYSCON=y
40# CONFIG_SPL_SIMPLE_BUS is not set
41CONFIG_CLK=y
42CONFIG_SPL_CLK=y
43CONFIG_ROCKCHIP_GPIO=y
44CONFIG_SYS_I2C_ROCKCHIP=y
Jonas Karlman269a37f2017-04-22 08:57:54 +000045CONFIG_MISC=y
46CONFIG_I2C_EEPROM=y
Masahiro Yamada7942e912017-01-10 13:32:04 +090047CONFIG_MMC_DW=y
Masahiro Yamadadc607f82017-01-10 13:32:03 +090048CONFIG_MMC_DW_ROCKCHIP=y
Jacob Chen5c3166d2017-02-23 14:20:17 +080049CONFIG_DM_ETH=y
Jacob Chen5c3166d2017-02-23 14:20:17 +080050CONFIG_ETH_DESIGNWARE=y
51CONFIG_GMAC_ROCKCHIP=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080052CONFIG_PINCTRL=y
53CONFIG_SPL_PINCTRL=y
54# CONFIG_SPL_PINCTRL_FULL is not set
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +020055CONFIG_PINCTRL_ROCKCHIP_RK3288=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080056CONFIG_DM_PMIC=y
Jacob Chen614704b2017-05-02 14:54:52 +080057CONFIG_PMIC_RK8XX=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080058CONFIG_DM_REGULATOR_FIXED=y
Jacob Chen614704b2017-05-02 14:54:52 +080059CONFIG_REGULATOR_RK8XX=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080060CONFIG_PWM_ROCKCHIP=y
61CONFIG_RAM=y
62CONFIG_SPL_RAM=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080063CONFIG_DEBUG_UART_BASE=0xff690000
64CONFIG_DEBUG_UART_CLOCK=24000000
65CONFIG_DEBUG_UART_SHIFT=2
66CONFIG_SYS_NS16550=y
Tom Riniafea41d2016-09-08 16:11:59 -040067CONFIG_SYSRESET=y
Eddie Caid1ba93e2017-03-07 12:47:07 +080068CONFIG_USB=y
Philipp Tomsich54983812017-07-03 18:30:06 +020069CONFIG_USB_DWC2=y
Eddie Caid1ba93e2017-03-07 12:47:07 +080070CONFIG_USB_STORAGE=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +080071CONFIG_USE_TINY_PRINTF=y
72CONFIG_CMD_DHRYSTONE=y
73CONFIG_ERRNO_STR=y