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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +00002/*
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 *
5 * Configuration settings for the MX53-EVK Freescale board.
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +00006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Fabio Estevam17978382011-09-22 08:07:22 +000011#define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
12
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000013#include <asm/arch/imx-regs.h>
14
Fabio Estevamb1574ff2011-10-27 01:32:43 +000015#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Fabio Estevamb1574ff2011-10-27 01:32:43 +000016#define CONFIG_SETUP_MEMORY_TAGS
17#define CONFIG_INITRD_TAG
Fabio Estevam5db5f412013-04-24 14:44:26 +000018#define CONFIG_REVISION_TAG
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000019
Gong Qianyu52de2e52015-10-26 19:47:42 +080020#define CONFIG_SYS_FSL_CLK
Fabio Estevam31ab5852014-04-22 15:34:58 -030021
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000022/* Size of malloc() pool */
23#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
24
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000025#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010026#define CONFIG_MXC_UART_BASE UART1_BASE
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000027
28/* I2C Configs */
trem03997412013-09-21 18:13:36 +020029#define CONFIG_SYS_I2C
30#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020031#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
32#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070033#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000034
35/* PMIC Configs */
Ɓukasz Majewski1b6d9ed2012-11-13 03:22:14 +000036#define CONFIG_POWER
37#define CONFIG_POWER_I2C
38#define CONFIG_POWER_FSL
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000039#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
Simon Glass02229812014-05-20 06:01:34 -060040#define CONFIG_POWER_FSL_MC13892
Fabio Estevamaf98ea02011-10-25 01:44:19 +000041#define CONFIG_RTC_MC13XXX
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000042
43/* MMC Configs */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000044#define CONFIG_SYS_FSL_ESDHC_ADDR 0
45#define CONFIG_SYS_FSL_ESDHC_NUM 2
46
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000047/* Eth Configs */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000048
49#define CONFIG_FEC_MXC
50#define IMX_FEC_BASE FEC_BASE_ADDR
51#define CONFIG_FEC_MXC_PHYADDR 0x1F
52
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000053/* allow to overwrite serial and ethaddr */
54#define CONFIG_ENV_OVERWRITE
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000055
56/* Command definition */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000057
Wolfgang Grandegger96529e22011-10-17 08:21:56 +000058#define CONFIG_ETHPRIME "FEC0"
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000059
60#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000061
62#define CONFIG_EXTRA_ENV_SETTINGS \
63 "script=boot.scr\0" \
64 "uimage=uImage\0" \
65 "mmcdev=0\0" \
66 "mmcpart=2\0" \
67 "mmcroot=/dev/mmcblk0p3 rw\0" \
68 "mmcrootfstype=ext3 rootwait\0" \
69 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
70 "root=${mmcroot} " \
71 "rootfstype=${mmcrootfstype}\0" \
72 "loadbootscript=" \
73 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
74 "bootscript=echo Running bootscript from mmc ...; " \
75 "source\0" \
76 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
77 "mmcboot=echo Booting from mmc ...; " \
78 "run mmcargs; " \
79 "bootm\0" \
80 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
81 "root=/dev/nfs " \
82 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
83 "netboot=echo Booting from net ...; " \
84 "run netargs; " \
85 "dhcp ${uimage}; bootm\0" \
86
87#define CONFIG_BOOTCOMMAND \
Andrew Bradforde1c7c8a2012-10-01 05:06:52 +000088 "mmc dev ${mmcdev}; if mmc rescan; then " \
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +000089 "if run loadbootscript; then " \
90 "run bootscript; " \
91 "else " \
92 "if run loaduimage; then " \
93 "run mmcboot; " \
94 "else run netboot; " \
95 "fi; " \
96 "fi; " \
97 "else run netboot; fi"
98
99#define CONFIG_ARP_TIMEOUT 200UL
100
101/* Miscellaneous configurable options */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000102
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000103#define CONFIG_SYS_MEMTEST_START 0x70000000
Fabio Estevam8d790c72012-02-09 14:25:09 +0000104#define CONFIG_SYS_MEMTEST_END 0x70010000
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000105
106#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
107
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000108/* Physical Memory Map */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000109#define PHYS_SDRAM_1 CSD0_BASE_ADDR
110#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
111
112#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
113#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
114#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
115
116#define CONFIG_SYS_INIT_SP_OFFSET \
117 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
118#define CONFIG_SYS_INIT_SP_ADDR \
119 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
120
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900121/* environment organization */
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000122#define CONFIG_SYS_MMC_ENV_DEV 0
123
Liu Hui-R643434cf4cd72011-01-03 22:27:42 +0000124#endif /* __CONFIG_H */