Xingyu Wu | a3897e6 | 2023-07-07 18:50:11 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2022 StarFive Technology Co., Ltd. |
| 4 | * Author: Yanhong Wang <yanhong.wang@starfivetech.com> |
| 5 | */ |
| 6 | |
| 7 | #ifndef __CLK_STARFIVE_H |
| 8 | #define __CLK_STARFIVE_H |
| 9 | |
| 10 | /* the number of fixed clocks in DTS */ |
| 11 | #define JH7110_EXTCLK_END 12 |
| 12 | |
| 13 | #define _JH7110_CLK_OPS(_name) \ |
| 14 | static const struct clk_ops jh7110_##_name##_clk_ops = { \ |
| 15 | .set_rate = ccf_clk_set_rate, \ |
| 16 | .get_rate = ccf_clk_get_rate, \ |
| 17 | .set_parent = ccf_clk_set_parent, \ |
| 18 | .enable = ccf_clk_enable, \ |
| 19 | .disable = ccf_clk_disable, \ |
| 20 | .of_xlate = jh7110_##_name##_clk_of_xlate, \ |
| 21 | } |
| 22 | |
| 23 | #define JH7110_CLK_OPS(name) _JH7110_CLK_OPS(name) |
| 24 | |
| 25 | #endif |