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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Tom Rinia2f4c912013-08-09 11:22:17 -04002/*
3 * ti_armv7_common.h
4 *
5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 *
Tom Rinia2f4c912013-08-09 11:22:17 -04007 * The various ARMv7 SoCs from TI all share a number of IP blocks when
8 * implementing a given feature. Rather than define these in every
9 * board or even SoC common file, we define a common file to be re-used
10 * in all cases. While technically true that some of these details are
11 * configurable at the board design, they are common throughout SoC
12 * reference platforms as well as custom designs and become de facto
13 * standards.
14 */
15
16#ifndef __CONFIG_TI_ARMV7_COMMON_H__
17#define __CONFIG_TI_ARMV7_COMMON_H__
18
Tom Rinia2f4c912013-08-09 11:22:17 -040019/*
Tom Rini96886f22014-03-28 15:03:29 -040020 * We setup defaults based on constraints from the Linux kernel, which should
21 * also be safe elsewhere. We have the default load at 32MB into DDR (for
22 * the kernel), FDT above 128MB (the maximum location for the end of the
23 * kernel), and the ramdisk 512KB above that (allowing for hopefully never
24 * seen large trees). We say all of this must be within the first 256MB
25 * as that will normally be within the kernel lowmem and thus visible via
26 * bootm_size and we only run on platforms with 256MB or more of memory.
Sam Protsenko1651ee12020-01-24 17:53:49 +020027 *
28 * As a temporary storage for DTBO blobs (which should be applied into DTB
29 * blob), we use the location 15.5 MB above the ramdisk. If someone wants to
30 * use ramdisk bigger than 15.5 MB, then DTBO can be loaded and applied to DTB
31 * blob before loading the ramdisk, as DTBO location is only used as a temporary
32 * storage, and can be re-used after 'fdt apply' command is done.
Tom Rinia2f4c912013-08-09 11:22:17 -040033 */
Tom Rini96886f22014-03-28 15:03:29 -040034#define DEFAULT_LINUX_BOOT_ENV \
35 "loadaddr=0x82000000\0" \
36 "kernel_addr_r=0x82000000\0" \
37 "fdtaddr=0x88000000\0" \
Sam Protsenko1651ee12020-01-24 17:53:49 +020038 "dtboaddr=0x89000000\0" \
Tom Rini96886f22014-03-28 15:03:29 -040039 "fdt_addr_r=0x88000000\0" \
40 "rdaddr=0x88080000\0" \
41 "ramdisk_addr_r=0x88080000\0" \
Sjoerd Simons3a3b3d12015-08-28 15:01:55 +020042 "scriptaddr=0x80000000\0" \
43 "pxefile_addr_r=0x80100000\0" \
Lokesh Vutlaf01f8b32016-11-29 11:57:59 +053044 "bootm_size=0x10000000\0" \
45 "boot_fdt=try\0"
Tom Rinia2f4c912013-08-09 11:22:17 -040046
Lokesh Vutlac2913ac2016-11-29 11:58:00 +053047#define DEFAULT_FIT_TI_ARGS \
48 "boot_fit=0\0" \
Andrew F. Davis5589be62019-08-12 15:59:54 -040049 "addr_fit=0x90000000\0" \
Andrew F. Davis77c875c2019-08-12 15:59:55 -040050 "name_fit=fitImage\0" \
51 "update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}\0" \
Andrew F. Davisc21e8192019-08-26 17:51:00 -040052 "get_overlaystring=" \
Suman Annaad30ac32020-04-24 13:39:52 -050053 "for overlay in $name_overlays;" \
Andrew F. Davisc21e8192019-08-26 17:51:00 -040054 "do;" \
55 "setenv overlaystring ${overlaystring}'#'${overlay};" \
56 "done;\0" \
Andrew F. Davis014c73c2019-09-17 15:40:25 -040057 "run_fit=bootm ${addr_fit}#${fdtfile}${overlaystring}\0" \
Lokesh Vutlac2913ac2016-11-29 11:58:00 +053058
Tom Rinia2f4c912013-08-09 11:22:17 -040059/*
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010060 * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
61 * we say (for simplicity) that we have 1 bank, always, even when
62 * we have more. We always start at 0x80000000, and we place the
63 * initial stack pointer in our SRAM. Otherwise, we can define
64 * CONFIG_NR_DRAM_BANKS before including this file.
Tom Rinia2f4c912013-08-09 11:22:17 -040065 */
Tom Rinia2f4c912013-08-09 11:22:17 -040066#define CONFIG_SYS_SDRAM_BASE 0x80000000
Nishanth Menonb4471512015-07-22 18:05:45 -050067
68#ifndef CONFIG_SYS_INIT_SP_ADDR
Tom Rinia2f4c912013-08-09 11:22:17 -040069#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
70 GENERATED_GBL_DATA_SIZE)
Nishanth Menonb4471512015-07-22 18:05:45 -050071#endif
Tom Rinia2f4c912013-08-09 11:22:17 -040072
73/* Timer information. */
74#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Tom Rinia2f4c912013-08-09 11:22:17 -040075
Jean-Jacques Hiblot52a51512018-12-07 14:50:49 +010076/* If DM_I2C, enable non-DM I2C support */
Tom Rinia2f4c912013-08-09 11:22:17 -040077
Tom Rinia2f4c912013-08-09 11:22:17 -040078/*
Tom Rinia2f4c912013-08-09 11:22:17 -040079 * The following are general good-enough settings for U-Boot. We set a
80 * large malloc pool as we generally have a lot of DDR, and we opt for
81 * function over binary size in the main portion of U-Boot as this is
82 * generally easily constrained later if needed. We enable the config
83 * options that give us information in the environment about what board
84 * we are on so we do not need to rely on the command prompt. We set a
85 * console baudrate of 115200 and use the default baud rate table.
86 */
Tom Rinic5e96362013-08-20 08:53:49 -040087
88/* As stated above, the following choices are optional. */
Tom Rinia2f4c912013-08-09 11:22:17 -040089
90/* We set the max number of command args high to avoid HUSH bugs. */
91#define CONFIG_SYS_MAXARGS 64
92
93/* Console I/O Buffer Size */
Lokesh Vutla79b68012016-11-25 11:14:26 +053094#define CONFIG_SYS_CBSIZE 1024
Tom Rinia2f4c912013-08-09 11:22:17 -040095/* Boot Argument Buffer Size */
96#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
97
Tom Rinia2f4c912013-08-09 11:22:17 -040098/*
99 * When we have SPI, NOR or NAND flash we expect to be making use of
100 * mtdparts, both for ease of use in U-Boot and for passing information
101 * on to the Linux kernel.
102 */
Tom Rinia2f4c912013-08-09 11:22:17 -0400103
Tom Rinia2f4c912013-08-09 11:22:17 -0400104/*
Tom Rinia2f4c912013-08-09 11:22:17 -0400105 * Our platforms make use of SPL to initalize the hardware (primarily
Andrew F. Davise2f61e72016-08-30 14:06:28 -0500106 * memory) enough for full U-Boot to be loaded. We make use of the general
107 * SPL framework found under common/spl/. Given our generally common memory
108 * map, we set a number of related defaults and sizes here.
Tom Rinia2f4c912013-08-09 11:22:17 -0400109 */
Sourav Poddar5248bba2014-05-19 16:53:37 -0400110#if !defined(CONFIG_NOR_BOOT) && \
111 !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
Andrew F. Davise2f61e72016-08-30 14:06:28 -0500112
113/*
114 * We also support Falcon Mode so that the Linux kernel can be booted
115 * directly from SPL. This is not currently available on HS devices.
116 */
Tom Rinia2f4c912013-08-09 11:22:17 -0400117
118/*
Tom Rinibe737992014-07-18 11:51:32 -0400119 * Place the image at the start of the ROM defined image space (per
120 * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
Tom Rinicfff4aa2016-08-26 13:30:43 -0400121 * downloaded image area minus 1KiB for scratch space. We initalize DRAM as
122 * soon as we can so that we can place stack, malloc and BSS there. We load
123 * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
124 * with older SPLs). We have our BSS be placed 2MiB after this, to allow for
125 * the default Linux kernel address of 0x80008000 to work with most sized
126 * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end
127 * of the BSS area. We suggest that the stack be placed at 32MiB after the
128 * start of DRAM to allow room for all of the above (handled in Kconfig).
Tom Rinia2f4c912013-08-09 11:22:17 -0400129 */
Tom Rinie10247f2014-04-03 15:17:15 -0400130#ifndef CONFIG_SPL_BSS_START_ADDR
Tom Rinia2f4c912013-08-09 11:22:17 -0400131#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
132#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
Tom Rinie10247f2014-04-03 15:17:15 -0400133#endif
134#ifndef CONFIG_SYS_SPL_MALLOC_START
Tom Rinia2f4c912013-08-09 11:22:17 -0400135#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
136 CONFIG_SPL_BSS_MAX_SIZE)
Tom Rinibc3a5572016-09-19 13:05:34 -0400137#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_8M
Tom Rinie10247f2014-04-03 15:17:15 -0400138#endif
Tom Rinicfff4aa2016-08-26 13:30:43 -0400139#ifndef CONFIG_SPL_MAX_SIZE
140#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
141 CONFIG_SPL_TEXT_BASE)
142#endif
143
Tom Rinia2f4c912013-08-09 11:22:17 -0400144
Tom Rinia2f4c912013-08-09 11:22:17 -0400145/* FAT sd card locations. */
Lokesh Vutlacbf54032018-11-02 19:51:07 +0530146#ifndef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200147#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Lokesh Vutlacbf54032018-11-02 19:51:07 +0530148#endif
Tom Rinia2f4c912013-08-09 11:22:17 -0400149
150#ifdef CONFIG_SPL_OS_BOOT
Tom Rinia2f4c912013-08-09 11:22:17 -0400151/* FAT */
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200152#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
153#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
Tom Rinia2f4c912013-08-09 11:22:17 -0400154
155/* RAW SD card / eMMC */
Jean-Jacques Hiblota0900532017-05-24 12:08:27 +0200156#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1700 /* address 0x2E0000 */
157#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */
158#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200 /* 256KiB */
Tom Rinia2f4c912013-08-09 11:22:17 -0400159#endif
160
Tom Rinif48e5ee2013-08-20 08:53:44 -0400161/* General parts of the framework, required. */
Tom Rinia2f4c912013-08-09 11:22:17 -0400162
Miquel Raynald0935362019-10-03 19:50:03 +0200163#ifdef CONFIG_MTD_RAW_NAND
Tom Rinia2f4c912013-08-09 11:22:17 -0400164#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
Tom Rinia2f4c912013-08-09 11:22:17 -0400165#endif
166#endif /* !CONFIG_NOR_BOOT */
167
Cooper Jr., Franklin07610ab2015-04-21 07:51:04 -0500168/* Generic Environment Variables */
169
170#ifdef CONFIG_CMD_NET
171#define NETARGS \
172 "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
173 "::off\0" \
174 "nfsopts=nolock\0" \
175 "rootpath=/export/rootfs\0" \
176 "netloadimage=tftp ${loadaddr} ${bootfile}\0" \
177 "netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \
178 "netargs=setenv bootargs console=${console} " \
179 "${optargs} " \
180 "root=/dev/nfs " \
181 "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
182 "ip=dhcp\0" \
183 "netboot=echo Booting from network ...; " \
184 "setenv autoload no; " \
185 "dhcp; " \
186 "run netloadimage; " \
187 "run netloadfdt; " \
188 "run netargs; " \
189 "bootz ${loadaddr} - ${fdtaddr}\0"
Cooper Jr., Franklindcee9cf2015-06-10 08:54:02 -0500190#else
191#define NETARGS ""
Cooper Jr., Franklin07610ab2015-04-21 07:51:04 -0500192#endif
193
Tom Rinia2f4c912013-08-09 11:22:17 -0400194#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */