blob: 3b76949a264357dd0a3f89693c53a37cba0572c1 [file] [log] [blame]
liu hao1c4a2c42019-10-31 07:51:08 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019, Phytium Ltd.
4 * shuyiqi <shuyiqi@phytium.com.cn>
5 */
6
7/dts-v1/;
8
9/ {
10 model = "Phytium Durian";
11 compatible = "phytium,durian";
12 #address-cells = <2>;
13 #size-cells = <2>;
14
15 pcie-controller@40000000 {
16 compatible = "phytium,pcie-host-1.0";
17 device_type = "pci";
18 #address-cells = <3>;
19 #size-cells = <2>;
20 reg = <0x0 0x40000000 0x0 0x10000000>;
21 bus-range = <0x0 0xff>;
22 ranges = <0x1000000 0x0 0x0 0x0 0x50000000 0x0 0xF00000>,
23 <0x2000000 0x0 0x58000000 0x0 0x58000000 0x0 0x28000000>,
24 <0x43000000 0x10 0x00000000 0x10 0x00000000 0x10 0x00000000>;
25 };
26
27 uart@28001000 {
28 compatible = "arm,pl011";
29 reg = <0x0 0x28001000 0x0 0x1000>;
30 clock = <48000000>;
31 };
32};
33